[coreboot-gerrit] Change in coreboot[master]: mb/google/brya/var/taeko: Add SOC_INTEL_ALDERLAKE_PCH_P token in Kcon...

[Joey Peng (Code Review)]

Joey Peng has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/60022 )

Change subject: mb/google/brya/var/taeko: Add SOC_INTEL_ALDERLAKE_PCH_P token in Kconfig.name
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mb/google/brya/var/taeko: Add SOC_INTEL_ALDERLAKE_PCH_P token in Kconfig.name

We occurred an issue on taeko and brya that FW versions after 14388
will fail to boot up and bios boot logs will show Cannot find PCIE
Root port 5 and PCIE Root port 9.

After adding SOC_INTEL_ALDERLAKE_PCH_P in Kconfig.name we can solve
this issue.

BUG=b:210089175
TEST=emerge-brya coreboot and can boot up taeko successfully.

Signed-off-by: Joey Peng 
Change-Id: Ic58f8fee87559f2d5ad107ca3c9da882e4eb2381
---
M src/mainboard/google/brya/Kconfig.name
1 file changed, 2 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/22/60022/1

diff --git a/src/mainboard/google/brya/Kconfig.name b/src/mainboard/google/brya/Kconfig.name
index ead3348..1498e09 100644
--- a/src/mainboard/google/brya/Kconfig.name
+++ b/src/mainboard/google/brya/Kconfig.name
@@ -98,11 +98,13 @@
    bool "->  Taeko"
    select BOARD_GOOGLE_BASEBOARD_BRYA
    select DRIVERS_GENESYSLOGIC_GL9763E
+	select SOC_INTEL_ALDERLAKE_PCH_P

config BOARD_GOOGLE_TAEKO4ES
    bool "->  Taeko4ES"
    select BOARD_GOOGLE_BASEBOARD_BRYA
    select DRIVERS_GENESYSLOGIC_GL9763E
+	select SOC_INTEL_ALDERLAKE_PCH_P

config BOARD_GOOGLE_FELWINTER
    bool "->  Felwinter"