Yu-Ping Wu has submitted this change. ( https://review.coreboot.org/c/coreboot/+/85777?usp=email )
Change subject: mb/google/rauru: Initialize SPM ......................................................................
mb/google/rauru: Initialize SPM
Initialize SPM (System Power Management) in RAM stage. This adds 3ms to the boot time.
coreboot log: CBFS: Found 'spm_firmware.bin' @0xadf00 size 0x5a60 in mcache @0xfffdd3c mtk_init_mcu: Loaded (and reset) spm_firmware.bin in 3 msecs (30080 byt)
TEST=Build pass. BUG=b:317009620
Change-Id: Idfa08a8aa44838e84bc69e2b717254a281796bf0 Signed-off-by: Jarried Lin jarried.lin@mediatek.corp-partner.google.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/85777 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Yu-Ping Wu yupingso@google.com Reviewed-by: Yidi Lin yidilin@google.com --- M src/mainboard/google/rauru/mainboard.c 1 file changed, 4 insertions(+), 0 deletions(-)
Approvals: Yidi Lin: Looks good to me, approved Yu-Ping Wu: Looks good to me, approved build bot (Jenkins): Verified
diff --git a/src/mainboard/google/rauru/mainboard.c b/src/mainboard/google/rauru/mainboard.c index c1a4347..a49caf6 100644 --- a/src/mainboard/google/rauru/mainboard.c +++ b/src/mainboard/google/rauru/mainboard.c @@ -11,6 +11,7 @@ #include <soc/i2c.h> #include <soc/msdc.h> #include <soc/pcie.h> +#include <soc/spm_common.h> #include <soc/usb.h>
#include "gpio.h" @@ -62,6 +63,9 @@ if (dpm_init()) printk(BIOS_ERR, "dpm init failed, DVFS may not work\n");
+ if (spm_init()) + printk(BIOS_ERR, "spm init failed, Suspend may not work\n"); + if (CONFIG(ARM64_USE_ARM_TRUSTED_FIRMWARE)) register_reset_to_bl31(GPIO_AP_EC_WARM_RST_REQ.id, true); }