Attention is currently required from: Julius Werner, Moritz Fischer.
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/50889 )
Change subject: soc/rockchip/rk3399/clock: Add rkclk_ddr_reset() function
......................................................................
Patch Set 2: Code-Review+1
(1 comment)
File src/soc/rockchip/rk3399/clock.c:
https://review.coreboot.org/c/coreboot/+/50889/comment/20d42396_843bea53
PS2, Line 656: ((n) << (9 + (ch) * 4)))
Hmm, am I missing something, or could this be simpler?
#define CRU_SFTRST_DDR_CTRL(ch, n) ((1 << 16 | (n)) << (8 + (ch) * 4))
#define CRU_SFTRST_DDR_PHY(ch, n) ((1 << 16 | (n)) << (9 + (ch) * 4))
--
To view, visit
https://review.coreboot.org/c/coreboot/+/50889
To unsubscribe, or for help writing mail filters, visit
https://review.coreboot.org/settings
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: If1da85064d75bdf49b7555d09257409443c25e8a
Gerrit-Change-Number: 50889
Gerrit-PatchSet: 2
Gerrit-Owner: Moritz Fischer
moritzf@google.com
Gerrit-Reviewer: Angel Pons
th3fanbus@gmail.com
Gerrit-Reviewer: Julius Werner
jwerner@chromium.org
Gerrit-Reviewer: build bot (Jenkins)
no-reply@coreboot.org
Gerrit-Attention: Julius Werner
jwerner@chromium.org
Gerrit-Attention: Moritz Fischer
moritzf@google.com
Gerrit-Comment-Date: Fri, 19 Feb 2021 00:15:00 +0000
Gerrit-HasComments: Yes
Gerrit-Has-Labels: Yes
Gerrit-MessageType: comment