Alexandru Gagniuc (mr.nuke.me@gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/8280
-gerrit
commit 8838bd01597af673e766de3c1ec8162886fb86a4 Author: Alexandru Gagniuc mr.nuke.me@gmail.com Date: Sun Jan 25 21:08:42 2015 -0600
include/types.h: Provide BIT() macro
Change-Id: I86cd8a16420f34ef31b615aec4e0f7bd3191ca35 Signed-off-by: Alexandru Gagniuc mr.nuke.me@gmail.com --- src/include/types.h | 7 +++++++ src/soc/nvidia/tegra/dc.h | 1 - src/soc/qualcomm/ipq806x/include/clock.h | 1 - 3 files changed, 7 insertions(+), 2 deletions(-)
diff --git a/src/include/types.h b/src/include/types.h index ef5edc1..24ebfaf 100644 --- a/src/include/types.h +++ b/src/include/types.h @@ -22,6 +22,13 @@ #include <stdint.h> #include <stddef.h>
+/* + * This may mean something else on architectures where the bits are numbered + * from the MSB (e.g. PowerPC), but until we cross that bridge, this macro is + * perfectly fine. + */ +#define BIT(x) (1ul << (x)) + /** * Coreboot error codes * diff --git a/src/soc/nvidia/tegra/dc.h b/src/soc/nvidia/tegra/dc.h index c0b1986..ff36a0b 100644 --- a/src/soc/nvidia/tegra/dc.h +++ b/src/soc/nvidia/tegra/dc.h @@ -367,7 +367,6 @@ struct display_controller { }; check_member(display_controller, winbuf, 0x800 * 4);
-#define BIT(pos) (1U << pos)
/* DC_CMD_DISPLAY_COMMAND 0x032 */ #define DISP_COMMAND_RAISE (1 << 0) diff --git a/src/soc/qualcomm/ipq806x/include/clock.h b/src/soc/qualcomm/ipq806x/include/clock.h index 98f6661..d9e7834 100644 --- a/src/soc/qualcomm/ipq806x/include/clock.h +++ b/src/soc/qualcomm/ipq806x/include/clock.h @@ -40,7 +40,6 @@
/* UART specific definitions */
-#define BIT(s) (1<<s) #define Uart_ns_val NS(BIT_POS_31,BIT_POS_16,N_VALUE,M_VALUE, 5, 4, 3, 1, 2, 0,3) #define Uart_clk_ns_mask (BM(BIT_POS_31, BIT_POS_16) | BM(BIT_POS_6, BIT_POS_0)) #define Uart_mnd_en_mask BIT(8) * !!(625)