Sumeet R Pawnikar has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/47010 )
Change subject: mb/google/dedede/var/drawcia: Probe and enable DPTF configuration ......................................................................
Patch Set 5:
(2 comments)
https://review.coreboot.org/c/coreboot/+/47010/5/src/mainboard/google/dedede... File src/mainboard/google/dedede/variants/drawcia/overridetree.cb:
https://review.coreboot.org/c/coreboot/+/47010/5/src/mainboard/google/dedede... PS5, Line 95: 65
Yes that is correct. I could have moved the difference into a . […]
Thanks for this info.
https://review.coreboot.org/c/coreboot/+/47010/5/src/mainboard/google/dedede... PS5, Line 139: # Default DPTF Policy for all drawcia boards if not overridden : register "options.tsr[0].desc" = ""Memory"" : register "options.tsr[1].desc" = ""Ambient"" : register "options.tsr[2].desc" = ""Charger"" : register "options.tsr[3].desc" = ""5V regulator""
I may be wrong, but I am not aware of any such option. […]
Tim, do you have any suggestion here ? Please, let's know.
This TSR1 trip value depends on tuning as per current on-going discussion with ODM on b:169691800