[coreboot-gerrit] Change in coreboot[master]: sb/intel/lynxpoint: Correct read width in RMW cycle

[Patrick Rudolph (Code Review)]

Attention is currently required from: Angel Pons.
Patrick Rudolph has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/47098 )

Change subject: sb/intel/lynxpoint: Correct read width in RMW cycle
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Patch Set 4:

(1 comment)

File src/southbridge/intel/lynxpoint/sata.c:

https://review.coreboot.org/c/coreboot/+/47098/comment/f83c2810_ce0c7d5f 
PS4, Line 70: 	reg32 = pci_read_config32(dev, 0x98);
This was likely done on purpose to not clear bits [16:32]. Some bits here are RWONCE and are undefined on the first read.