Attention is currently required from: Bora Guvendik, Cliff Huang, Jérémy Compostella, Kapil Porwal, Pranava Y N, Ravishankar Sarawadi, Saurabh Mishra.
Subrata Banik has posted comments on this change by Saurabh Mishra. ( https://review.coreboot.org/c/coreboot/+/83635?usp=email )
Change subject: soc/intel/ptl: Do initial Panther Lake SoC commit till romstage
......................................................................
Patch Set 75:
(3 comments)
File src/soc/intel/pantherlake/Kconfig:
https://review.coreboot.org/c/coreboot/+/83635/comment/d8b04cac_353db7d1?usp... :
PS75, Line 49: PTL-H 12Xe (25W) SoC.
wrap up text > 96 char per line. please use liner breaker
https://review.coreboot.org/c/coreboot/+/83635/comment/aab062e2_1b6b83a6?usp... :
PS75, Line 59: U/
should remove `U`
File src/soc/intel/pantherlake/chip.h:
https://review.coreboot.org/c/coreboot/+/83635/comment/196f4cb4_5197c1a6?usp... :
PS74, Line 162: enum {
: IGD_SM_0MB = 0x00,
: IGD_SM_32MB = 0x01,
: IGD_SM_64MB = 0x02,
: IGD_SM_96MB = 0x03,
: IGD_SM_128MB = 0x04,
: IGD_SM_160MB = 0x05,
: IGD_SM_4MB = 0xF0,
: IGD_SM_8MB = 0xF1,
: IGD_SM_12MB = 0xF2,
: IGD_SM_16MB = 0xF3,
: IGD_SM_20MB = 0xF4,
: IGD_SM_24MB = 0xF5,
: IGD_SM_28MB = 0xF6,
: IGD_SM_36MB = 0xF8,
: IGD_SM_40MB = 0xF9,
: IGD_SM_44MB = 0xFA,
: IGD_SM_48MB = 0xFB,
: IGD_SM_52MB = 0xFC,
: IGD_SM_56MB = 0xFD,
: IGD_SM_60MB = 0xFE,
: } IgdDvmt50PreAlloc;
Hi Subrata, we are using these macro to set IGD stolen size in romstage. Will be used using FSP UPD.
i meant to check the macro values are applicable as per PTL-FSP if this is still relevant as you copied this one from MTL.
Also, try to keep comments open while we are having a discussion. I have seen that you keep on marking the comment resolve while i have asked something and expected to hear some response.
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