Mario Scheithauer has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/31802
Change subject: src/soc/intel/apollolake/cpu.c: Set up local APIC ......................................................................
src/soc/intel/apollolake/cpu.c: Set up local APIC
Some Apollo Lake mainboards use SeaBIOS as payload. SeaBIOS requires the initialization of the programmable interrupt controller (PIC) for faultless operation. Therefore add setup_lapic() to configure the APIC.
Change-Id: I00b339ce1850729023db74da7f8845927a95dcc6 Signed-off-by: Mario Scheithauer mario.scheithauer@siemens.com --- M src/soc/intel/apollolake/cpu.c 1 file changed, 6 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/02/31802/1
diff --git a/src/soc/intel/apollolake/cpu.c b/src/soc/intel/apollolake/cpu.c index a08f1f0..7d42d6b 100644 --- a/src/soc/intel/apollolake/cpu.c +++ b/src/soc/intel/apollolake/cpu.c @@ -2,7 +2,7 @@ * This file is part of the coreboot project. * * Copyright (C) 2015-2017 Intel Corp. - * Copyright (C) 2017 Siemens AG, Inc. + * Copyright (C) 2017-2019 Siemens AG * (Written by Andrey Petrov andrey.petrov@intel.com for Intel Corp.) * (Written by Alexandru Gagniuc alexandrux.gagniuc@intel.com for Intel Corp.) * @@ -23,6 +23,7 @@ #include "chip.h" #include <cpu/cpu.h> #include <cpu/x86/cache.h> +#include <cpu/x86/lapic.h> #include <cpu/x86/mp.h> #include <cpu/intel/microcode.h> #include <cpu/intel/turbo.h> @@ -161,6 +162,10 @@ } x86_setup_mtrrs_with_detect(); x86_mtrr_check(); + + /* Enable the local CPU apics */ + if (IS_ENABLED(CONFIG_PAYLOAD_SEABIOS)) + setup_lapic(); }
#if !IS_ENABLED(CONFIG_SOC_INTEL_COMMON_BLOCK_CPU_MPINIT)