Isaac Christensen (isaac.christensen@se-eng.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/6709
-gerrit
commit 88a8d8b8baa80f8d17f5f6c5d7dac1394c7fbe63 Author: Gabe Black gabeblack@google.com Date: Sun Sep 29 03:02:55 2013 -0700
ARM: Overhaul the ARM Makefile.
The ARM Makefile was copied from x86 and then modified, and as a result it was carrying a lot of baggage. On top of that, the extra complication made it inflexible, and we need a lot of flexiblity in order to support the fact that the Tegra124 starts on an ARMv4 coprocessor instead of one of the ARMv7 main CPUs.
Change-Id: Ia6ddc27619bdb51e152ad0c628ad6f3037c103ce Signed-off-by: Gabe Black gabeblack@google.com Reviewed-on: https://chromium-review.googlesource.com/171017 Reviewed-by: Ronald Minnich rminnich@chromium.org Commit-Queue: Gabe Black gabeblack@chromium.org Tested-by: Gabe Black gabeblack@chromium.org (cherry picked from commit 512d942788336c8d52470135b43ee4e6a1c95f6c) Signed-off-by: Isaac Christensen isaac.christensen@se-eng.com --- src/arch/armv7/Kconfig | 8 +++ src/arch/armv7/Makefile.inc | 112 +++++------------------------ src/arch/armv7/bootblock.S | 113 ++++++++++++++++++++++++++++++ src/arch/armv7/bootblock.inc | 113 ------------------------------ src/arch/armv7/bootblock.ld | 57 +++++++++++++++ src/arch/armv7/bootblock.lds | 56 --------------- src/arch/armv7/bootblock_simple.c | 10 +-- src/arch/armv7/id.S | 20 ++++++ src/arch/armv7/id.inc | 18 ----- src/arch/armv7/include/bootblock_common.h | 14 ++-- src/arch/armv7/romstage.ld | 4 +- src/cpu/samsung/exynos5250/Kconfig | 9 +-- src/cpu/samsung/exynos5250/Makefile.inc | 1 + src/cpu/samsung/exynos5250/bootblock.c | 3 +- src/cpu/samsung/exynos5420/Kconfig | 9 +-- src/cpu/samsung/exynos5420/Makefile.inc | 1 + src/cpu/samsung/exynos5420/bootblock.c | 2 +- src/soc/nvidia/tegra124/Kconfig | 1 + src/soc/nvidia/tegra124/Makefile.inc | 1 + src/soc/nvidia/tegra124/bootblock.c | 3 +- 20 files changed, 240 insertions(+), 315 deletions(-)
diff --git a/src/arch/armv7/Kconfig b/src/arch/armv7/Kconfig index ec24e17..a7f5b23 100644 --- a/src/arch/armv7/Kconfig +++ b/src/arch/armv7/Kconfig @@ -10,3 +10,11 @@ config ARCH_ROMSTAGE_ARMV7 config ARCH_RAMSTAGE_ARMV7 bool default n + +config CPU_HAS_BOOTBLOCK_INIT + bool + default n + +config MAINBOARD_HAS_BOOTBLOCK_INIT + bool + default n \ No newline at end of file diff --git a/src/arch/armv7/Makefile.inc b/src/arch/armv7/Makefile.inc index f633644..a18398a 100644 --- a/src/arch/armv7/Makefile.inc +++ b/src/arch/armv7/Makefile.inc @@ -51,6 +51,13 @@ endif # CONFIG_ARCH_ARMV7
ifeq ($(CONFIG_ARCH_BOOTBLOCK_ARMV7),y)
+bootblock-y += id.S +bootblock-y += bootblock.S + +$(obj)/arch/arm/id.bootblock.o: $(obj)/build.h +bootblock-y += $(call strip_quotes,$(CONFIG_BOOTBLOCK_SOURCE)) + +bootblock-y += stages.c bootblock-y += cache.c bootblock-y += eabi_compat.c bootblock-y += memset.S @@ -58,46 +65,12 @@ bootblock-y += memcpy.S bootblock-y += memmove.S bootblock-y += mmu.c
-bootblock_lds = $(src)/arch/armv7/bootblock.lds -bootblock_lds += $(chipset_bootblock_lds) - -bootblock_inc += $(src)/arch/armv7/bootblock.inc -bootblock_inc += $(src)/arch/armv7/id.inc -bootblock_inc += $(chipset_bootblock_inc) -bootblock_inc += $(objgenerated)/bootblock.inc - -bootblock_custom = $(src)/$(call strip_quotes,$(CONFIG_BOOTBLOCK_CPU_INIT)) -bootblock_custom += $(src)/$(call strip_quotes,$(CONFIG_BOOTBLOCK_MAINBOARD_INIT)) - -$(objgenerated)/bootblock.ld: $$(bootblock_lds) $(obj)/ldoptions - @printf " GEN $(subst $(obj)/,,$(@))\n" - printf '$(foreach ldscript,ldoptions $(bootblock_lds),INCLUDE "$(ldscript)"\n)' > $@ - -$(objgenerated)/bootblock_inc.S: $$(bootblock_inc) - @printf " GEN $(subst $(obj)/,,$(@))\n" - printf '$(foreach crt0,$(bootblock_inc),#include "$(crt0)"\n)' > $@ - -$(objgenerated)/bootblock.o: $(objgenerated)/bootblock.s - @printf " CC $(subst $(obj)/,,$(@))\n" - $(CC_bootblock) $(CPPFLAGS_bootblock) -Wa,-acdlns -c -o $@ $< > $(basename $@).disasm - -$(objgenerated)/bootblock.s: $(objgenerated)/bootblock_inc.S $(obj)/config.h $(obj)/build.h - @printf " CC $(subst $(obj)/,,$(@))\n" - $(CC_bootblock) $(CPPFLAGS_bootblock) -MMD -x assembler-with-cpp -E -I$(src)/include -I$(src)/arch/armv7/include -I$(obj) -include $(obj)/build.h -include $(obj)/config.h -I. -I$(src) $< -o $@ - -$(objgenerated)/bootblock.inc: $(src)/arch/armv7/$(subst ",,$(CONFIG_BOOTBLOCK_SOURCE)) $(bootblock_custom) $(OPTION_TABLE_H) $(obj)/config.h - @printf " CC $(subst $(obj)/,,$(@))\n" - $(CC_bootblock) $(CFLAGS_bootblock) $(CPPFLAGS_bootblock) -MM \ - -MT$(objgenerated)/bootblock.inc \ - $< > $(objgenerated)/bootblock.inc.d - $(CC_bootblock) -c -S $(CFLAGS_bootblock) -I. $(CPPFLAGS_bootblock) $< -o $@ - -$(objcbfs)/bootblock.debug: $(objgenerated)/bootblock.o $(objgenerated)/bootblock.ld $$(bootblock-objs) $(stages) $(obj)/config.h +$(objcbfs)/bootblock.debug: $(src)/arch/armv7/bootblock.ld $(obj)/ldoptions $$(bootblock-objs) $(obj)/config.h @printf " LINK $(subst $(obj)/,,$(@))\n" ifeq ($(CONFIG_COMPILER_LLVM_CLANG),y) - $(LD_bootblock) -m armelf_linux_eabi -include $(obj)/config.h -static -o $@.tmp -L$(obj) $< -T $(objgenerated)/bootblock.ld + $(LD_bootblock) -m armelf_linux_eabi -static -o $@ -L$(obj) $< -T $(src)/arch/armv7/bootblock.ld else - $(CC_bootblock) -nostdlib -nostartfiles -include $(obj)/config.h -static -o $@ -L$(obj) -T $(objgenerated)/bootblock.ld -Wl,--start-group $(objgenerated)/bootblock.o $(bootblock-objs) $(stages) $(LIBGCC_FILE_NAME_bootblock) -Wl,--end-group + $(CC_bootblock) $(CFLAGS_bootblock) -nostartfiles -include $(obj)/config.h -static -o $@ -L$(obj) -T $(src)/arch/armv7/bootblock.ld -Wl,--start-group $(bootblock-objs) $(LIBGCC_FILE_NAME_bootblock) -Wl,--end-group endif
endif # CONFIG_ARCH_BOOTBLOCK_ARMV7 @@ -108,50 +81,24 @@ endif # CONFIG_ARCH_BOOTBLOCK_ARMV7
ifeq ($(CONFIG_ARCH_ROMSTAGE_ARMV7),y)
+romstage-y += stages.c romstage-y += cache.c romstage-y += div0.c romstage-y += eabi_compat.c romstage-y += memset.S romstage-y += memcpy.S romstage-y += memmove.S -romstage-srcs += $(objgenerated)/crt0.s - -ldscripts = -ldscripts += $(src)/arch/armv7/romstage.ld
-crt0s += $(cpu_incs) -crt0s += $(cpu_incs-y) +VBOOT_STUB_DEPS += $(obj)/arch/armv7/eabi_compat.rmodules_arm.o
-$(objcbfs)/romstage.debug: $$(romstage-objs) $(stages_o) $(objgenerated)/romstage.ld +$(objcbfs)/romstage.debug: $$(romstage-objs) $(src)/arch/armv7/romstage.ld $(obj)/ldoptions @printf " LINK $(subst $(obj)/,,$(@))\n" ifeq ($(CONFIG_COMPILER_LLVM_CLANG),y) - $(LD_romstage) -nostdlib -nostartfiles -static -o $@ -L$(obj) $(romstage-objs) -T $(objgenerated)/romstage.ld + $(LD_romstage) -nostdlib -nostartfiles -static -o $@ -L$(obj) $(romstage-objs) -T $(src)/arch/armv7/romstage.ld else - $(CC_romstage) -nostdlib -nostartfiles -static -o $@ -L$(obj) -T $(objgenerated)/romstage.ld -Wl,--start-group $(romstage-objs) $(stages_o) $(LIBGCC_FILE_NAME_romstage) -Wl,--end-group + $(CC_romstage) $(CFLAGS_romstage) -nostartfiles -static -o $@ -L$(obj) -T $(src)/arch/armv7/romstage.ld -Wl,--start-group $(romstage-objs) $(LIBGCC_FILE_NAME_romstage) -Wl,--end-group endif
-$(objgenerated)/romstage.ld: $$(ldscripts) $(obj)/ldoptions - @printf " GEN $(subst $(obj)/,,$(@))\n" - rm -f $@ - printf '$(foreach ldscript,ldoptions $(ldscripts),INCLUDE "$(ldscript:$(obj)/%=%)"\n)' >> $@.tmp - mv $@.tmp $@ - -$(objgenerated)/crt0.romstage.S: $$(crt0s) - @printf " GEN $(subst $(obj)/,,$(@))\n" - printf '$(foreach crt0,$(crt0s),#include "$(crt0:$(obj)/%=%)"\n)' > $@ - -$(objgenerated)/crt0.romstage.o: $(objgenerated)/crt0.s - @printf " CC $(subst $(obj)/,,$(@))\n" - $(CC_romstage) -Wa,-acdlns -c -o $@ $< > $(basename $@).disasm - -$(objgenerated)/crt0.s: $(objgenerated)/crt0.romstage.S $(obj)/config.h $(obj)/build.h - @printf " CC $(subst $(obj)/,,$(@))\n" - $(CC_romstage) -MMD -x assembler-with-cpp -E -I$(src)/include -I$(src)/arch/armv7/include -I$(obj) -include $(obj)/config.h -include $(obj)/build.h -I. -I$(src) $< -o $@ - -$(obj)/mainboard/$(MAINBOARDDIR)/romstage.pre.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(OPTION_TABLE_H) $(obj)/build.h $(obj)/config.h - @printf " CC romstage.inc\n" - $(CC_romstage) -MMD $(CFLAGS_romstage) $(CPPFLAGS_romstage) -D__PRE_RAM__ -I$(src) -I. -I$(obj) -c -S $< -o $@ - endif # CONFIG_ARCH_ROMSTAGE_ARMV7
############################################################################### @@ -160,6 +107,7 @@ endif # CONFIG_ARCH_ROMSTAGE_ARMV7
ifeq ($(CONFIG_ARCH_RAMSTAGE_ARMV7),y)
+ramstage-y += stages.c ramstage-y += exception.c ramstage-y += exception_asm.S ramstage-y += div0.c @@ -174,12 +122,12 @@ ramstage-y += memcpy.S ramstage-y += memmove.S ramstage-srcs += $(wildcard src/mainboard/$(MAINBOARDDIR)/mainboard.c)
-$(objcbfs)/ramstage.debug: $(objgenerated)/ramstage.o $(src)/arch/armv7/ramstage.ld +$(objcbfs)/ramstage.debug: $$(ramstage-objs) $(LIBGCC_FILE_NAME_ramstage) $(src)/arch/armv7/ramstage.ld $(obj)/ldoptions @printf " CC $(subst $(obj)/,,$(@))\n" ifeq ($(CONFIG_COMPILER_LLVM_CLANG),y) $(LD_ramstage) -m armelf_linux_eabi -o $@ -L$(obj) $< -T $(src)/arch/armv7/ramstage.ld else - $(CC_ramstage) -nostdlib -nostartfiles -static -o $@ -L$(obj) -T $(src)/arch/armv7/ramstage.ld $< + $(CC_ramstage) $(CFLAGS_ramstage) -nostdlib -nostartfiles -static -o $@ -L$(obj) -Wl,--start-group $(ramstage-objs) $(LIBGCC_FILE_NAME_ramstage) -Wl,--end-group -T $(src)/arch/armv7/ramstage.ld endif
$(objgenerated)/ramstage.o: $(stages_o) $$(ramstage-objs) $(LIBGCC_FILE_NAME_ramstage) @@ -190,28 +138,4 @@ else $(CC_ramstage) $(CFLAGS_ramstage) $(CPPFLAGS_ramstage) -nostdlib -r -o $@ -Wl,--start-group $(stages_o) $(ramstage-objs) $(LIBGCC_FILE_NAME_ramstage) -Wl,--end-group endif
-ifeq ($(CONFIG_GENERATE_PIRQ_TABLE),y) -ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/irq_tables.c -endif -ifeq ($(CONFIG_BOARD_HAS_HARD_RESET),y) -ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/reset.c -endif -ifeq ($(CONFIG_GENERATE_ACPI_TABLES),y) -ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/acpi_tables.c -ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/dsdt.asl -# make doesn't have arithmetic operators or greater-than comparisons -ifeq ($(subst 5,4,$(CONFIG_ACPI_SSDTX_NUM)),4) -ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/ssdt2.asl -ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/ssdt3.asl -ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/ssdt4.asl -endif -ifeq ($(CONFIG_ACPI_SSDTX_NUM),5) -ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/ssdt5.asl -endif -endif - -ifeq ($(CONFIG_HAVE_BUS_CONFIG),y) -ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/get_bus_conf.c -endif - endif # CONFIG_ARCH_RAMSTAGE_ARMV7 diff --git a/src/arch/armv7/bootblock.S b/src/arch/armv7/bootblock.S new file mode 100644 index 0000000..b28a787 --- /dev/null +++ b/src/arch/armv7/bootblock.S @@ -0,0 +1,113 @@ +/* + * Early initialization code for ARMv7 architecture. + * + * This file is based off of the OMAP3530/ARM Cortex start.S file from Das + * U-Boot, which itself got the file from armboot. + * + * Copyright (c) 2004 Texas Instruments r-woodruff2@ti.com + * Copyright (c) 2001 Marius Gröger mag@sysgo.de + * Copyright (c) 2002 Alex Züpke azu@sysgo.de + * Copyright (c) 2002 Gary Jennejohn garyj@denx.de + * Copyright (c) 2003 Richard Woodruff r-woodruff2@ti.com + * Copyright (c) 2003 Kshitij kshitij@ti.com + * Copyright (c) 2006-2008 Syed Mohammed Khasim x0khasim@ti.com + * Copyright (c) 2013 The Chromium OS Authors + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; version 2 of + * the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +.section ".start", "a", %progbits +.globl _start +_start: b reset + .balignl 16,0xdeadbeef + +_cbfs_master_header: + /* The CBFS master header is inserted by cbfstool at the first + * aligned offset after the above anchor string is found. + * Hence, we leave some space for it. + */ + .skip 128 @ Assumes 64-byte alignment + +reset: + /* + * Set the cpu to System mode with IRQ and FIQ disabled. Prefetch/Data + * aborts may happen early and crash before the abort handlers are + * installed, but at least the problem will show up near the code that + * causes it. + */ + msr cpsr_cxf, #0xdf + + /* + * From Cortex-A Series Programmer's Guide: + * Only CPU 0 performs initialization. Other CPUs go into WFI + * to do this, first work out which CPU this is + * this code typically is run before any other initialization step + */ + mrc p15, 0, r1, c0, c0, 5 @ Read Multiprocessor Affinity Register + and r1, r1, #0x3 @ Extract CPU ID bits + cmp r1, #0 + bne wait_for_interrupt @ If this is not core0, wait + + /* + * Initialize the stack to a known value. This is used to check for + * stack overflow later in the boot process. + */ + ldr r0, .Stack + ldr r1, .Stack_size + sub r0, r0, r1 + ldr r1, .Stack + ldr r2, =0xdeadbeef +init_stack_loop: + str r2, [r0] + add r0, #4 + cmp r0, r1 + bne init_stack_loop + +/* Set stackpointer in internal RAM to call board_init_f */ +call_bootblock: + ldr sp, .Stack /* Set up stack pointer */ + ldr r0,=0x00000000 + /* + * The current design of cpu_info places the + * struct at the top of the stack. The number of + * words pushed must be at least as large as that + * struct. + */ + push {r0-r2} + bic sp, sp, #7 /* 8-byte alignment for ABI compliance */ + /* + * Use "bl" instead of "b" even though we do not intend to return. + * "bl" gets compiled to "blx" if we're transitioning from ARM to + * Thumb. However, "b" will not and GCC may attempt to create a + * wrapper which is currently broken. + */ + bl main + +wait_for_interrupt: + wfi + mov pc, lr @ back to my caller + +/* we do it this way because it's a 32-bit constant and + * in some cases too far away to be loaded as just an offset + * from IP + */ +.align 2 +.Stack: + .word CONFIG_STACK_TOP +.align 2 +/* create this size the same way we do in coreboot_ram.ld: top-bottom */ +.Stack_size: + .word CONFIG_STACK_TOP - CONFIG_STACK_BOTTOM diff --git a/src/arch/armv7/bootblock.inc b/src/arch/armv7/bootblock.inc deleted file mode 100644 index b28a787..0000000 --- a/src/arch/armv7/bootblock.inc +++ /dev/null @@ -1,113 +0,0 @@ -/* - * Early initialization code for ARMv7 architecture. - * - * This file is based off of the OMAP3530/ARM Cortex start.S file from Das - * U-Boot, which itself got the file from armboot. - * - * Copyright (c) 2004 Texas Instruments r-woodruff2@ti.com - * Copyright (c) 2001 Marius Gröger mag@sysgo.de - * Copyright (c) 2002 Alex Züpke azu@sysgo.de - * Copyright (c) 2002 Gary Jennejohn garyj@denx.de - * Copyright (c) 2003 Richard Woodruff r-woodruff2@ti.com - * Copyright (c) 2003 Kshitij kshitij@ti.com - * Copyright (c) 2006-2008 Syed Mohammed Khasim x0khasim@ti.com - * Copyright (c) 2013 The Chromium OS Authors - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; version 2 of - * the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -.section ".start", "a", %progbits -.globl _start -_start: b reset - .balignl 16,0xdeadbeef - -_cbfs_master_header: - /* The CBFS master header is inserted by cbfstool at the first - * aligned offset after the above anchor string is found. - * Hence, we leave some space for it. - */ - .skip 128 @ Assumes 64-byte alignment - -reset: - /* - * Set the cpu to System mode with IRQ and FIQ disabled. Prefetch/Data - * aborts may happen early and crash before the abort handlers are - * installed, but at least the problem will show up near the code that - * causes it. - */ - msr cpsr_cxf, #0xdf - - /* - * From Cortex-A Series Programmer's Guide: - * Only CPU 0 performs initialization. Other CPUs go into WFI - * to do this, first work out which CPU this is - * this code typically is run before any other initialization step - */ - mrc p15, 0, r1, c0, c0, 5 @ Read Multiprocessor Affinity Register - and r1, r1, #0x3 @ Extract CPU ID bits - cmp r1, #0 - bne wait_for_interrupt @ If this is not core0, wait - - /* - * Initialize the stack to a known value. This is used to check for - * stack overflow later in the boot process. - */ - ldr r0, .Stack - ldr r1, .Stack_size - sub r0, r0, r1 - ldr r1, .Stack - ldr r2, =0xdeadbeef -init_stack_loop: - str r2, [r0] - add r0, #4 - cmp r0, r1 - bne init_stack_loop - -/* Set stackpointer in internal RAM to call board_init_f */ -call_bootblock: - ldr sp, .Stack /* Set up stack pointer */ - ldr r0,=0x00000000 - /* - * The current design of cpu_info places the - * struct at the top of the stack. The number of - * words pushed must be at least as large as that - * struct. - */ - push {r0-r2} - bic sp, sp, #7 /* 8-byte alignment for ABI compliance */ - /* - * Use "bl" instead of "b" even though we do not intend to return. - * "bl" gets compiled to "blx" if we're transitioning from ARM to - * Thumb. However, "b" will not and GCC may attempt to create a - * wrapper which is currently broken. - */ - bl main - -wait_for_interrupt: - wfi - mov pc, lr @ back to my caller - -/* we do it this way because it's a 32-bit constant and - * in some cases too far away to be loaded as just an offset - * from IP - */ -.align 2 -.Stack: - .word CONFIG_STACK_TOP -.align 2 -/* create this size the same way we do in coreboot_ram.ld: top-bottom */ -.Stack_size: - .word CONFIG_STACK_TOP - CONFIG_STACK_BOTTOM diff --git a/src/arch/armv7/bootblock.ld b/src/arch/armv7/bootblock.ld new file mode 100644 index 0000000..706f0a2 --- /dev/null +++ b/src/arch/armv7/bootblock.ld @@ -0,0 +1,57 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2006 Advanced Micro Devices, Inc. + * Copyright (C) 2008-2010 coresystems GmbH + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +/* We use ELF as output format. So that we can debug the code in some form. */ +OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") +OUTPUT_ARCH(arm) +INCLUDE ldoptions + +PHDRS +{ + to_load PT_LOAD; +} + +TARGET(binary) +SECTIONS +{ + ROMLOC = CONFIG_BOOTBLOCK_BASE; + + /* This section might be better named .setup */ + .rom ROMLOC : { + _rom = .; + *(.start); + *(.id); + *(.text); + *(.text.*); + *(.rom.text); + *(.rom.data); + *(.rom.data.*); + *(.rodata.*); + _erom = .; + } : to_load = 0xff + + /DISCARD/ : { + *(.comment) + *(.note) + *(.comment.*) + *(.note.*) + *(.ARM.*) + } +} diff --git a/src/arch/armv7/bootblock.lds b/src/arch/armv7/bootblock.lds deleted file mode 100644 index f16e72b..0000000 --- a/src/arch/armv7/bootblock.lds +++ /dev/null @@ -1,56 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2006 Advanced Micro Devices, Inc. - * Copyright (C) 2008-2010 coresystems GmbH - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ - -/* We use ELF as output format. So that we can debug the code in some form. */ -OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") -OUTPUT_ARCH(arm) - -PHDRS -{ - to_load PT_LOAD; -} - -TARGET(binary) -SECTIONS -{ - ROMLOC = CONFIG_BOOTBLOCK_BASE; - - /* This section might be better named .setup */ - .rom ROMLOC : { - _rom = .; - *(.start); - *(.id); - *(.text); - *(.text.*); - *(.rom.text); - *(.rom.data); - *(.rom.data.*); - *(.rodata.*); - _erom = .; - } : to_load = 0xff - - /DISCARD/ : { - *(.comment) - *(.note) - *(.comment.*) - *(.note.*) - *(.ARM.*) - } -} diff --git a/src/arch/armv7/bootblock_simple.c b/src/arch/armv7/bootblock_simple.c index bc3ef53..bcd83b8 100644 --- a/src/arch/armv7/bootblock_simple.c +++ b/src/arch/armv7/bootblock_simple.c @@ -19,16 +19,14 @@ * MA 02110-1301 USA */
-#include <bootblock_common.h> #include <arch/cache.h> #include <arch/hlt.h> #include <arch/stages.h> +#include <bootblock_common.h> #include <cbfs.h> #include <console/console.h> #include <smp/node.h>
-#include "stages.c" - void main(void) { const char *stage_name = "fallback/romstage"; @@ -51,10 +49,8 @@ void main(void) sctlr |= SCTLR_Z | SCTLR_I; write_sctlr(sctlr);
- if (boot_cpu()) { - bootblock_cpu_init(); - bootblock_mainboard_init(); - } + bootblock_cpu_init(); + bootblock_mainboard_init();
#if CONFIG_BOOTBLOCK_CONSOLE console_init(); diff --git a/src/arch/armv7/id.S b/src/arch/armv7/id.S new file mode 100644 index 0000000..a588f1e --- /dev/null +++ b/src/arch/armv7/id.S @@ -0,0 +1,20 @@ +#include <build.h> + + .section ".id", "a", %progbits + + .globl __id_start +__id_start: +ver: + .asciz COREBOOT_VERSION +vendor: + .asciz CONFIG_MAINBOARD_VENDOR +part: + .asciz CONFIG_MAINBOARD_PART_NUMBER +.long __id_end - ver /* Reverse offset to the vendor id */ +.long __id_end - vendor /* Reverse offset to the vendor id */ +.long __id_end - part /* Reverse offset to the part number */ +.long CONFIG_ROM_SIZE /* Size of this romimage */ + .globl __id_end + +__id_end: +.previous diff --git a/src/arch/armv7/id.inc b/src/arch/armv7/id.inc deleted file mode 100644 index ffe547d..0000000 --- a/src/arch/armv7/id.inc +++ /dev/null @@ -1,18 +0,0 @@ - .section ".id", "a", %progbits - - .globl __id_start -__id_start: -ver: - .asciz COREBOOT_VERSION -vendor: - .asciz CONFIG_MAINBOARD_VENDOR -part: - .asciz CONFIG_MAINBOARD_PART_NUMBER -.long __id_end - ver /* Reverse offset to the vendor id */ -.long __id_end - vendor /* Reverse offset to the vendor id */ -.long __id_end - part /* Reverse offset to the part number */ -.long CONFIG_ROM_SIZE /* Size of this romimage */ - .globl __id_end - -__id_end: -.previous diff --git a/src/arch/armv7/include/bootblock_common.h b/src/arch/armv7/include/bootblock_common.h index 2fa705f..034a12b 100644 --- a/src/arch/armv7/include/bootblock_common.h +++ b/src/arch/armv7/include/bootblock_common.h @@ -1,11 +1,15 @@ -#ifdef CONFIG_BOOTBLOCK_CPU_INIT -#include CONFIG_BOOTBLOCK_CPU_INIT +#if CONFIG_CPU_HAS_BOOTBLOCK_INIT +void bootblock_cpu_init(void); +#else +static void __attribute__((unused)) bootblock_cpu_init(void) +{ +} #endif
-#ifdef CONFIG_BOOTBLOCK_MAINBOARD_INIT -#include CONFIG_BOOTBLOCK_MAINBOARD_INIT +#if CONFIG_MAINBOARD_HAS_BOOTBLOCK_INIT +void bootblock_mainboard_init(void); #else -static void bootblock_mainboard_init(void) +static void __attribute__((unused)) bootblock_mainboard_init(void) { } #endif diff --git a/src/arch/armv7/romstage.ld b/src/arch/armv7/romstage.ld index 0ebcd53..a9c3f8b 100644 --- a/src/arch/armv7/romstage.ld +++ b/src/arch/armv7/romstage.ld @@ -20,13 +20,11 @@ */
/* We use ELF as output format. So that we can debug the code in some form. */ -/* - INCLUDE ldoptions - */
/* We use ELF as output format. So that we can debug the code in some form. */ OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") OUTPUT_ARCH(arm) +INCLUDE ldoptions
ENTRY(stage_entry)
diff --git a/src/cpu/samsung/exynos5250/Kconfig b/src/cpu/samsung/exynos5250/Kconfig index 116f568..2b4ad39 100644 --- a/src/cpu/samsung/exynos5250/Kconfig +++ b/src/cpu/samsung/exynos5250/Kconfig @@ -2,6 +2,7 @@ config CPU_SAMSUNG_EXYNOS5250 select ARCH_BOOTBLOCK_ARMV7 select ARCH_ROMSTAGE_ARMV7 select ARCH_RAMSTAGE_ARMV7 + select CPU_HAS_BOOTBLOCK_INIT select HAVE_MONOTONIC_TIMER select HAVE_UART_SPECIAL select DYNAMIC_CBMEM @@ -10,14 +11,6 @@ config CPU_SAMSUNG_EXYNOS5250
if CPU_SAMSUNG_EXYNOS5250
-config BOOTBLOCK_CPU_INIT - string - default "cpu/samsung/exynos5250/bootblock.c" - help - CPU/SoC-specific bootblock code. This is useful if the - bootblock must load microcode or copy data from ROM before - searching for the bootblock. - # ROM image layout. # # 0x0000: vendor-provided BL1 (8k). diff --git a/src/cpu/samsung/exynos5250/Makefile.inc b/src/cpu/samsung/exynos5250/Makefile.inc index 4b967b0..8bbd38f 100644 --- a/src/cpu/samsung/exynos5250/Makefile.inc +++ b/src/cpu/samsung/exynos5250/Makefile.inc @@ -4,6 +4,7 @@ INTERMEDIATE += exynos5250_add_bl1
bootblock-y += spi.c alternate_cbfs.c +bootblock-y += bootblock.c bootblock-y += pinmux.c mct.c power.c # Clock is required for UART bootblock-$(CONFIG_BOOTBLOCK_CONSOLE) += clock_init.c diff --git a/src/cpu/samsung/exynos5250/bootblock.c b/src/cpu/samsung/exynos5250/bootblock.c index d3d737e..f524399 100644 --- a/src/cpu/samsung/exynos5250/bootblock.c +++ b/src/cpu/samsung/exynos5250/bootblock.c @@ -17,10 +17,11 @@ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */
+#include <bootblock_common.h> + #include "clk.h" #include "wakeup.h"
-void bootblock_cpu_init(void); void bootblock_cpu_init(void) { /* kick off the multi-core timer. diff --git a/src/cpu/samsung/exynos5420/Kconfig b/src/cpu/samsung/exynos5420/Kconfig index 460b177..a0d6c98 100644 --- a/src/cpu/samsung/exynos5420/Kconfig +++ b/src/cpu/samsung/exynos5420/Kconfig @@ -2,6 +2,7 @@ config CPU_SAMSUNG_EXYNOS5420 select ARCH_BOOTBLOCK_ARMV7 select ARCH_ROMSTAGE_ARMV7 select ARCH_RAMSTAGE_ARMV7 + select CPU_HAS_BOOTBLOCK_INIT select HAVE_MONOTONIC_TIMER select HAVE_UART_SPECIAL select RELOCATABLE_MODULES @@ -11,14 +12,6 @@ config CPU_SAMSUNG_EXYNOS5420
if CPU_SAMSUNG_EXYNOS5420
-config BOOTBLOCK_CPU_INIT - string - default "cpu/samsung/exynos5420/bootblock.c" - help - CPU/SoC-specific bootblock code. This is useful if the - bootblock must load microcode or copy data from ROM before - searching for the bootblock. - # ROM image layout. # # 0x0000: vendor-provided BL1 (8k). diff --git a/src/cpu/samsung/exynos5420/Makefile.inc b/src/cpu/samsung/exynos5420/Makefile.inc index 897944c..76a3dc3 100644 --- a/src/cpu/samsung/exynos5420/Makefile.inc +++ b/src/cpu/samsung/exynos5420/Makefile.inc @@ -4,6 +4,7 @@ INTERMEDIATE += exynos5420_add_bl1
bootblock-y += spi.c alternate_cbfs.c +bootblock-y += bootblock.c bootblock-y += pinmux.c mct.c power.c # Clock is required for UART bootblock-$(CONFIG_BOOTBLOCK_CONSOLE) += clock_init.c diff --git a/src/cpu/samsung/exynos5420/bootblock.c b/src/cpu/samsung/exynos5420/bootblock.c index 97e85f1..5d2d2b7 100644 --- a/src/cpu/samsung/exynos5420/bootblock.c +++ b/src/cpu/samsung/exynos5420/bootblock.c @@ -17,6 +17,7 @@ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */
+#include <bootblock_common.h> #include <arch/cache.h>
#include "clk.h" @@ -28,7 +29,6 @@ #define SRAM_SIZE 1 #define SRAM_END (SRAM_START + SRAM_SIZE) /* plus one... */
-void bootblock_cpu_init(void); void bootblock_cpu_init(void) { /* kick off the multi-core timer. diff --git a/src/soc/nvidia/tegra124/Kconfig b/src/soc/nvidia/tegra124/Kconfig index 17e02e7..fd1f0aa 100644 --- a/src/soc/nvidia/tegra124/Kconfig +++ b/src/soc/nvidia/tegra124/Kconfig @@ -4,6 +4,7 @@ config SOC_NVIDIA_TEGRA124 select ARCH_RAMSTAGE_ARMV7 bool default n + select CPU_HAS_BOOTBLOCK_INIT
if SOC_NVIDIA_TEGRA124
diff --git a/src/soc/nvidia/tegra124/Makefile.inc b/src/soc/nvidia/tegra124/Makefile.inc index aa35b48..3f626cf 100644 --- a/src/soc/nvidia/tegra124/Makefile.inc +++ b/src/soc/nvidia/tegra124/Makefile.inc @@ -1,5 +1,6 @@ CBOOTIMAGE = cbootimage
+bootblock-y += bootblock.c bootblock-y += cbfs.c bootblock-y += clock.c bootblock-y += monotonic_timer.c diff --git a/src/soc/nvidia/tegra124/bootblock.c b/src/soc/nvidia/tegra124/bootblock.c index a8d6990..66e6b3b 100644 --- a/src/soc/nvidia/tegra124/bootblock.c +++ b/src/soc/nvidia/tegra124/bootblock.c @@ -17,7 +17,8 @@ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */
-void bootblock_cpu_init(void); +#include <bootblock_common.h> + void bootblock_cpu_init(void) { }