[coreboot-gerrit] Change in coreboot[master]: soc/intel/{cnl,icl}: Always use CAR NEM enhanced by default

[Nico Huber (Code Review)]

Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/34287 )

Change subject: soc/intel/{cnl,icl}: Always use CAR NEM enhanced by default
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Patch Set 2:
> Patch Set 2:
> > Patch Set 2:
> > > Patch Set 2: -Code-Review
> > >
> > > (1 comment)
> > >
> > > I've just boot-tested all affected boards (empty set, assuming abuilds
> > > configurations). So I don't think we should put more effort into this.
> > >
> > > However, on the FSP-T integration side, I've learned by now that my
> > > initial hunch why my board isn't booting must have been wrong: I thought
> > > it was because I left CPU_MICROCODE_CBFS_LEN/_LOC at 0. But the FSP
> > > integration guide for CFL (what I tested) says this would be ok.
> > >
> > > So it would be really nice if somebody could confirm if the FSP-T
> > > integration works/ever worked upstream.
> >
> > HI Maurice/BT/KW/Lean Sheng, can you please share your opinion on FSP-T integration work in upstream ?
>
> i remember to implement chrome-coreboot was using FSP_T till SKL platform and i have validated that flow. so code should be in upsteam for sure

I mean the integration into soc/intel/cannonlake/ in particular.
Also, AFAIR, cros firmware wasn't using FSP 2 for SKL. FSP 1.1
was similar, but uses different code paths, AFAICT.