Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/60133 )
Change subject: Documentation/releases: Improve CSME section ......................................................................
Documentation/releases: Improve CSME section
1. Fix typo in *based* 2. Use official spelling for Alder Lake 3. Mention *Converged Security* 4. Capitalize CMOS
Change-Id: I36eac6f017229a3e9261e0eb84371421927e1cae Fixes: 941239d54d (Documentation/releases: Update 4.16 release notes) Signed-off-by: Paul Menzel pmenzel@molgen.mpg.de Reviewed-on: https://review.coreboot.org/c/coreboot/+/60133 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Angel Pons th3fanbus@gmail.com --- M Documentation/releases/coreboot-4.16-relnotes.md 1 file changed, 6 insertions(+), 5 deletions(-)
Approvals: build bot (Jenkins): Verified Angel Pons: Looks good to me, approved
diff --git a/Documentation/releases/coreboot-4.16-relnotes.md b/Documentation/releases/coreboot-4.16-relnotes.md index 83b2760..55317a4 100644 --- a/Documentation/releases/coreboot-4.16-relnotes.md +++ b/Documentation/releases/coreboot-4.16-relnotes.md @@ -19,8 +19,9 @@ ### Add significant changes here
### Option to disable Intel Management Engine -Disable the Intel (CS)Management Engine via HECI based on Intel Core processors -from Skylake to Alderlake. State is set baed on a cmos value of `me_state`. A -value of `0` will result in a (CS)ME state of `0` (working) and value of `1` -will result in a (CS)ME state of `3` (disabled). For an example cmos layout and -more info, see [cse.c](../../src/soc/intel/common/block/cse/cse.c). +Disable the Intel (Converged Security) Management Engine ((CS)ME) via HECI based +on Intel Core processors from Skylake to Alder Lake. State is set based on a +CMOS value of `me_state`. A value of `0` will result in a (CS)ME state of `0` +(working) and value of `1` will result in a (CS)ME state of `3` (disabled). For +an example CMOS layout and more info, see +[cse.c](../../src/soc/intel/common/block/cse/cse.c).