HAOUAS Elyes has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/31870 )
Change subject: src: Add missing 'include <arch/io.h>' ......................................................................
Patch Set 1:
(9 comments)
https://review.coreboot.org/#/c/31870/1/src/drivers/xgi/common/vb_init.c File src/drivers/xgi/common/vb_init.c:
https://review.coreboot.org/#/c/31870/1/src/drivers/xgi/common/vb_init.c@112... PS1, Line 1125: outb(0x67, pVBInfo->P3c2); include <> added for this one
https://review.coreboot.org/#/c/31870/1/src/drivers/xgi/common/vb_setmode.c File src/drivers/xgi/common/vb_setmode.c:
https://review.coreboot.org/#/c/31870/1/src/drivers/xgi/common/vb_setmode.c@... PS1, Line 136: inb(pVBInfo->P3da); /* reset 3da */ : outb(i, pVBInfo->P3c0); /* set index */ : outb(ARdata, pVBInfo->P3c0); /* set data */ : } : : inb(pVBInfo->P3da); /* reset 3da */ : outb(0x14, pVBInfo->P3c0); /* set index */ : outb(0x00, pVBInfo->P3c0); /* set data */ : inb(pVBInfo->P3da); /* Enable Attribute */ : outb(0x20, pVBInfo->P3c0); include<> added for those
https://review.coreboot.org/#/c/31870/1/src/drivers/xgi/common/vb_util.c File src/drivers/xgi/common/vb_util.c:
https://review.coreboot.org/#/c/31870/1/src/drivers/xgi/common/vb_util.c@25 PS1, Line 25: outb(index, port); : outb(da added for 'outb'
https://review.coreboot.org/#/c/31870/1/src/lib/debug.c File src/lib/debug.c:
https://review.coreboot.org/#/c/31870/1/src/lib/debug.c@92 PS1, Line 92: inb(port); added for this one
https://review.coreboot.org/#/c/31870/1/src/southbridge/via/common/early_smb... File src/southbridge/via/common/early_smbus_delay.c:
https://review.coreboot.org/#/c/31870/1/src/southbridge/via/common/early_smb... PS1, Line 26: inb(0x80); for this one
https://review.coreboot.org/#/c/31870/1/src/southbridge/via/common/early_smb... File src/southbridge/via/common/early_smbus_is_busy.c:
https://review.coreboot.org/#/c/31870/1/src/southbridge/via/common/early_smb... PS1, Line 29: inb needs include 'io.h'
https://review.coreboot.org/#/c/31870/1/src/southbridge/via/common/early_smb... File src/southbridge/via/common/early_smbus_read_byte.c:
https://review.coreboot.org/#/c/31870/1/src/southbridge/via/common/early_smb... PS1, Line 35: outb(0x00, SMBHSTDAT0(smbus_dev)); needs arch/io.h
https://review.coreboot.org/#/c/31870/1/src/southbridge/via/common/early_smb... File src/southbridge/via/common/early_smbus_reset.c:
https://review.coreboot.org/#/c/31870/1/src/southbridge/via/common/early_smb... PS1, Line 28: outb here also it needs io.h
https://review.coreboot.org/#/c/31870/1/src/southbridge/via/common/early_smb... File src/southbridge/via/common/early_smbus_wait_until_ready.c:
https://review.coreboot.org/#/c/31870/1/src/southbridge/via/common/early_smb... PS1, Line 40: inb <arch/io.h>