Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/34358 )
Change subject: haswell: reinitialize EHCI debug hardware after raminit
......................................................................
Patch Set 4: Code-Review+2
(1 comment)
https://review.coreboot.org/c/coreboot/+/34358/2/src/northbridge/intel/haswe...
File src/northbridge/intel/haswell/raminit.c:
https://review.coreboot.org/c/coreboot/+/34358/2/src/northbridge/intel/haswe...
PS2, Line 159: if (rv) {
: switch (rv) {
: case -1:
: printk(BIOS_ERR, "PEI version mismatch.\n");
: break;
: case -2:
: printk(BIOS_ERR, "Invalid memory frequency.\n");
: break;
: default:
: printk(BIOS_ERR, "MRC returned %x.\n", rv);
: }
: die_with_post_code(POST_INVALID_VENDOR_BINARY,
: "Nonzero MRC return value.\n");
: }
Hmm, it looks like the added code can be put before the ``if (rv)`` line.
Done
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