[coreboot-gerrit] Change in coreboot[master]: Revert "cpu/x86/lapic: Unconditionally use CPUID leaf 0xb if available"

[Felix Held (Code Review)]

Felix Held has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/61776 )

Change subject: Revert "cpu/x86/lapic: Unconditionally use CPUID leaf 0xb if available"
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Revert "cpu/x86/lapic: Unconditionally use CPUID leaf 0xb if available"

This reverts commit ceaf959678905f44a54a116f37bd15acab5d4608.

The AMD Picasso SoC doesn't support x2APIC and neither advertises the
presence of its support via bit 21 in EAX of CPUID leaf 1 nor has the
bit 10 in the APIC base address MSR 0x1b set, but it does have 0xd CPUID
leaves, so just checking for the presence of that CPUID leaf isn't
sufficient to be sure that EDX of the CPUID leaf 0xb will contain a
valid APIC ID.

In the case of Picasso EDX of the CPUID leaf 0xb returns 0 for all cores
which causes coreboot to get stuck somewhere at the end of MP init.

I'm not 100% sure if we should additionally check bit 21 in EAX of CPUID
function 1 is set instead of adding back the is_x2apic_mode check.

TEST=Mandolin with a Picasso SoC boots again.

Signed-off-by: Felix Held 
Change-Id: If1e3c55ce2d048b14c08e06bb79810179a87993d
---
M src/cpu/x86/smm/smm_stub.S
M src/include/cpu/x86/lapic.h
2 files changed, 13 insertions(+), 8 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/76/61776/1

diff --git a/src/cpu/x86/smm/smm_stub.S b/src/cpu/x86/smm/smm_stub.S
index 25a35aa..c83839c 100644
--- a/src/cpu/x86/smm/smm_stub.S
+++ b/src/cpu/x86/smm/smm_stub.S
@@ -101,25 +101,30 @@
     * the OS can manipulate the APIC id use the non-changing cpuid result
     * for APIC id (eax). A table is used to handle a discontiguous
     * APIC id space.  */
+apic_id:
+	mov	$LAPIC_BASE_MSR, %ecx
+	rdmsr
+	and	$LAPIC_BASE_X2APIC_ENABLED, %eax
+	cmp	$LAPIC_BASE_X2APIC_ENABLED, %eax
+	jne	xapic

-	mov	$0, %eax
-	cpuid
-	cmp	$0xb, %eax
-	jc	1f
+x2apic:
    mov	$0xb, %eax
    mov	$0, %ecx
    cpuid
    mov	%edx, %eax
-	jmp	2f
-1:
+	jmp	apicid_end
+
+xapic:
    mov	$1, %eax
    cpuid
    mov	%ebx, %eax
    shr	$24, %eax
-2:

+apicid_end:
    mov	$(apic_to_cpu_num), %ebx
    xor	%ecx, %ecx
+
 1:
    cmp	(%ebx, %ecx, 2), %ax
    je	1f
diff --git a/src/include/cpu/x86/lapic.h b/src/include/cpu/x86/lapic.h
index 7006dbc..c509e61 100644
--- a/src/include/cpu/x86/lapic.h
+++ b/src/include/cpu/x86/lapic.h
@@ -126,7 +126,7 @@
 static __always_inline unsigned int initial_lapicid(void)
 {
    uint32_t lapicid;
-	if (cpuid_get_max_func() >= 0xb)
+	if (is_x2apic_mode() && cpuid_get_max_func() >= 0xb)
    	lapicid = cpuid_ext(0xb, 0).edx;
    else
    	lapicid = cpuid_ebx(1) >> 24;