[coreboot-gerrit] Change in coreboot[master]: soc/intel/alderlake: add chipset devicetree for ADL-S

[Michał Żygowski (Code Review)]

Attention is currently required from: Subrata Banik, Michał Kopeć.
Michał Żygowski has uploaded a new patch set (#9) to the change originally created by Michał Kopeć. ( https://review.coreboot.org/c/coreboot/+/63493 )

Change subject: soc/intel/alderlake: add chipset devicetree for ADL-S
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soc/intel/alderlake: add chipset devicetree for ADL-S

Add chipset devicetree and power limits for AlderLake-S platform.

Based on Intel docs #619501 and #619362.

Change-Id: I1dd72465c458b718ecfcb29c2f7e433a63b89807
Signed-off-by: Michał Kopeć 
---
M src/soc/intel/alderlake/Kconfig
M src/soc/intel/alderlake/chip.h
A src/soc/intel/alderlake/chipset_pch_s.cb
M src/soc/intel/alderlake/fsp_params.c
4 files changed, 213 insertions(+), 1 deletion(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/93/63493/9