[coreboot-gerrit] [S] Change in coreboot[master]: stoneyridge: Set the SPI read speed as 66MHz

[Martin Roth (Code Review)]

Attention is currently required from: Bao Zheng, Jason Nien, Zheng Bao.

Martin Roth has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/68884 )

Change subject: stoneyridge: Set the SPI read speed as 66MHz
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Patch Set 1: Code-Review-1

(1 comment)

Commit Message:

https://review.coreboot.org/c/coreboot/+/68884/comment/c284323e_e6b20811 
PS1, Line 7: stoneyridge: Set the SPI 
Isn't this changing the read MODE, not the speed?

I think we still want to use dual SPI, not single SPI.

I'm not convinced that this is right.