Zheng Bao (zheng.bao@amd.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/11374
-gerrit
commit 433ab04092f56f6a84e83eb2b93eff56f76c694e Author: zbao fishbaozi@gmail.com Date: Tue Aug 4 06:34:50 2015 -0400
AMD bettong: Fix the interrupt routine.
The unchanged code worked because the OS uses MSI instead APIC.
Change-Id: I893e73f2aab3227381e44406fa285613e4ba2904 Signed-off-by: Zheng Bao zheng.bao@amd.com Signed-off-by: Zheng Bao fishbaozi@gmail.com --- src/mainboard/amd/bettong/acpi/routing.asl | 90 ++++++++++++++++------ .../amd/pi/00660F01/acpi/northbridge.asl | 35 +++++++++ 2 files changed, 100 insertions(+), 25 deletions(-)
diff --git a/src/mainboard/amd/bettong/acpi/routing.asl b/src/mainboard/amd/bettong/acpi/routing.asl index 3cfdb79..2a559c8 100644 --- a/src/mainboard/amd/bettong/acpi/routing.asl +++ b/src/mainboard/amd/bettong/acpi/routing.asl @@ -109,12 +109,9 @@ Name(APR0, Package(){ Package(){0x0013FFFF, 0, 0, 18 }, Package(){0x0013FFFF, 1, 0, 17 },
- Package(){0x0016FFFF, 0, 0, 18 }, - Package(){0x0016FFFF, 1, 0, 17 }, - /* Bus 0, Dev 10 - USB: XHCI func 0, 1 */ - Package(){0x0010FFFF, 0, 0, 0x12}, - Package(){0x0010FFFF, 1, 0, 0x11}, + Package(){0x0010FFFF, 0, 0, 18}, + Package(){0x0010FFFF, 1, 0, 17},
/* Bus 0, Dev 17 - SATA controller */ Package(){0x0011FFFF, 0, 0, 19 }, @@ -148,10 +145,10 @@ Name(PS4, Package(){ }) Name(APS4, Package(){ /* PCIe slot - Hooked to PCIe slot 4 */ - Package(){0x0000FFFF, 0, 0, 16 }, - Package(){0x0000FFFF, 1, 0, 17 }, - Package(){0x0000FFFF, 2, 0, 18 }, - Package(){0x0000FFFF, 3, 0, 19 }, + Package(){0x0000FFFF, 0, 0, 24 }, + Package(){0x0000FFFF, 1, 0, 25 }, + Package(){0x0000FFFF, 2, 0, 26 }, + Package(){0x0000FFFF, 3, 0, 27 }, })
/* GPP 0 */ @@ -162,10 +159,10 @@ Name(PS5, Package(){ Package(){0x0000FFFF, 3, INTA, 0 }, }) Name(APS5, Package(){ - Package(){0x0000FFFF, 0, 0, 17 }, - Package(){0x0000FFFF, 1, 0, 18 }, - Package(){0x0000FFFF, 2, 0, 19 }, - Package(){0x0000FFFF, 3, 0, 16 }, + Package(){0x0000FFFF, 0, 0, 28 }, + Package(){0x0000FFFF, 1, 0, 29 }, + Package(){0x0000FFFF, 2, 0, 30 }, + Package(){0x0000FFFF, 3, 0, 31 }, })
/* GPP 1 */ @@ -176,10 +173,10 @@ Name(PS6, Package(){ Package(){0x0000FFFF, 3, INTB, 0 }, }) Name(APS6, Package(){ - Package(){0x0000FFFF, 0, 0, 18 }, - Package(){0x0000FFFF, 1, 0, 19 }, - Package(){0x0000FFFF, 2, 0, 16 }, - Package(){0x0000FFFF, 3, 0, 17 }, + Package(){0x0000FFFF, 0, 0, 32 }, + Package(){0x0000FFFF, 1, 0, 33 }, + Package(){0x0000FFFF, 2, 0, 34 }, + Package(){0x0000FFFF, 3, 0, 35 }, })
/* GPP 2 */ @@ -190,10 +187,10 @@ Name(PS7, Package(){ Package(){0x0000FFFF, 3, INTC, 0 }, }) Name(APS7, Package(){ - Package(){0x0000FFFF, 0, 0, 19 }, - Package(){0x0000FFFF, 1, 0, 16 }, - Package(){0x0000FFFF, 2, 0, 17 }, - Package(){0x0000FFFF, 3, 0, 18 }, + Package(){0x0000FFFF, 0, 0, 36 }, + Package(){0x0000FFFF, 1, 0, 37 }, + Package(){0x0000FFFF, 2, 0, 38 }, + Package(){0x0000FFFF, 3, 0, 39 }, })
/* GPP 3 */ @@ -204,9 +201,52 @@ Name(PS8, Package(){ Package(){0x0000FFFF, 3, INTD, 0 }, }) Name(APS8, Package(){ - Package(){0x0000FFFF, 0, 0, 16 }, - Package(){0x0000FFFF, 1, 0, 17 }, - Package(){0x0000FFFF, 2, 0, 18 }, - Package(){0x0000FFFF, 3, 0, 18 }, + Package(){0x0000FFFF, 0, 0, 40 }, + Package(){0x0000FFFF, 1, 0, 41 }, + Package(){0x0000FFFF, 2, 0, 42 }, + Package(){0x0000FFFF, 3, 0, 43 }, +}) + +/* GFX 2 */ +Name(PSA, Package(){ + Package(){0x0000FFFF, 0, INTA, 0 }, + Package(){0x0000FFFF, 1, INTB, 0 }, + Package(){0x0000FFFF, 2, INTC, 0 }, + Package(){0x0000FFFF, 3, INTD, 0 }, }) +Name(APSA, Package(){ + Package(){0x0000FFFF, 0, 0, 52 }, + Package(){0x0000FFFF, 1, 0, 53 }, + Package(){0x0000FFFF, 2, 0, 54 }, + Package(){0x0000FFFF, 3, 0, 55 }, +}) + +/* GFX 3 */ +Name(PSB, Package(){ + Package(){0x0000FFFF, 0, INTA, 0 }, + Package(){0x0000FFFF, 1, INTB, 0 }, + Package(){0x0000FFFF, 2, INTC, 0 }, + Package(){0x0000FFFF, 3, INTD, 0 }, +}) +Name(APSB, Package(){ + Package(){0x0000FFFF, 0, 0, 27 }, + Package(){0x0000FFFF, 1, 0, 24 }, + Package(){0x0000FFFF, 2, 0, 25 }, + Package(){0x0000FFFF, 3, 0, 26 }, +}) + +/* GFX 4 */ +Name(PSC, Package(){ + Package(){0x0000FFFF, 0, INTA, 0 }, + Package(){0x0000FFFF, 1, INTB, 0 }, + Package(){0x0000FFFF, 2, INTC, 0 }, + Package(){0x0000FFFF, 3, INTD, 0 }, +}) +Name(APSC, Package(){ + Package(){0x0000FFFF, 0, 0, 31 }, + Package(){0x0000FFFF, 1, 0, 28 }, + Package(){0x0000FFFF, 2, 0, 29 }, + Package(){0x0000FFFF, 3, 0, 30 }, +}) +
diff --git a/src/northbridge/amd/pi/00660F01/acpi/northbridge.asl b/src/northbridge/amd/pi/00660F01/acpi/northbridge.asl index 7a9960f..b3df987 100644 --- a/src/northbridge/amd/pi/00660F01/acpi/northbridge.asl +++ b/src/northbridge/amd/pi/00660F01/acpi/northbridge.asl @@ -98,3 +98,38 @@ Device(PBR8) { Return (PS8) /* PIC Mode */ } /* end _PRT */ } /* end PBR8 */ + +/* GFX 1 */ +Device(PBR9) { + Name(_ADR, 0x00030002) +} /* end PBR8 */ + +/* GFX 2 */ +Device(PBRA) { + Name(_ADR, 0x00030003) + Name(_PRW, Package() {0x18, 4}) + Method(_PRT,0) { + If(PMOD){ Return(APSA) } /* APIC mode */ + Return (PSA) /* PIC Mode */ + } /* end _PRT */ +} /* end PBR8 */ + +/* GFX 3 */ +Device(PBRB) { + Name(_ADR, 0x00030004) + Name(_PRW, Package() {0x18, 4}) + Method(_PRT,0) { + If(PMOD){ Return(APSB) } /* APIC mode */ + Return (PSB) /* PIC Mode */ + } /* end _PRT */ +} /* end PBR8 */ + +/* GFX 4 */ +Device(PBRC) { + Name(_ADR, 0x00030005) + Name(_PRW, Package() {0x18, 4}) + Method(_PRT,0) { + If(PMOD){ Return(APSC) } /* APIC mode */ + Return (PSC) /* PIC Mode */ + } /* end _PRT */ +} /* end PBR8 */