HAOUAS Elyes has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/33211 )
Change subject: nb/amd/amdmct/mct: Deduplicate conditional ......................................................................
Patch Set 1:
(1 comment)
https://review.coreboot.org/#/c/33211/1/src/northbridge/amd/amdmct/mct/mctar... File src/northbridge/amd/amdmct/mct/mctardk3.c:
https://review.coreboot.org/#/c/33211/1/src/northbridge/amd/amdmct/mct/mctar... PS1, Line 84: if (val) { : //FIXME: skip for Ax : valx = pDCTstat->DimmDRPresent; : if (dct == 0) { : valx &= 0x55; : } else { : valx &= 0xAA; : valx >>= 1; : } : val &= valx; : if (val != 0) { : pDCTstat->CH_ADDR_TMG[dct] &= 0xFFFF00FF; : pDCTstat->CH_ADDR_TMG[dct] |= 0x00002F00; : } as at line #102, "if (pDCTstat->Speed == 3 || pDCTstat->Speed == 3)" is true and "if (pDCTstat->Speed == 3 || pDCTstat->Speed == 4)" is also true,
would this fix the typo/bug?
if (val) { //FIXME: skip for Ax valx = pDCTstat->DimmDRPresent; if (dct == 0) { valx &= 0x55; } else { valx &= 0xAA; valx >>= 1; } if (mctGet_NVbits(NV_MAX_DIMMS) == 8) { val &= valx; if (val != 0) { pDCTstat->CH_ADDR_TMG[dct] &= 0xFFFF00FF; pDCTstat->CH_ADDR_TMG[dct] |= 0x00002F00; } } else { val &= valx; if (val != 0) { pDCTstat->CH_ADDR_TMG[dct] &= 0xFFFF00FF; pDCTstat->CH_ADDR_TMG[dct] |= 0x00002F00; }
}