[coreboot-gerrit] Change in coreboot[master]: soc/medaitek/mt8195: adjust USB phy shift value

[Rex-BC Chen (Code Review)]

Attention is currently required from: Hung-Te Lin, Tianping Fang, Yu-Ping Wu.
Hello Hung-Te Lin, Tianping Fang, Yu-Ping Wu,

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/60312

to look at the new patch set (#3).

Change subject: soc/medaitek/mt8195: adjust USB phy shift value
......................................................................

soc/medaitek/mt8195: adjust USB phy shift value

There is a issue of bit shift which will drop a bit for USB3 phy on
MT8195. Therefore, we add this patch to set USB phy registers from
value of efuse.

BUG=b:211528577
TEST=build pass

Signed-off-by: Rex-BC Chen 
Signed-off-by: Tianping Fang 
Tested-by: Tianping Fang 
Change-Id: I43cb6c1c795dd181d6eba7f3bc52e4eb1a602081
---
M src/soc/mediatek/common/include/soc/usb_common.h
M src/soc/mediatek/common/usb.c
M src/soc/mediatek/mt8195/include/soc/usb.h
M src/soc/mediatek/mt8195/usb.c
4 files changed, 61 insertions(+), 4 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/12/60312/3