Brandon Breitenstein has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/43771 )
Change subject: mb/volteer: Disable TBT if platform is only USB3 ......................................................................
mb/volteer: Disable TBT if platform is only USB3
TBT ports should be disabled if the DB is a USB3 DB. It is assumed if the DB doesn't support TBT the platform as a whole should only be USB3 capable and TBT functionality on both ports should be disabled
BUG=NONE BRANCH=NONE TEST=Built coreboot and verified that TBT was disabled on platform with USB3 DB and enabled on platform with USB4/TBT DB
Change-Id: I594f2e9483aaf896de2b6aea9a3460bd3826c58c Signed-off-by: Brandon Breitenstein brandon.breitenstein@intel.com --- M src/mainboard/google/volteer/romstage.c 1 file changed, 7 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/71/43771/1
diff --git a/src/mainboard/google/volteer/romstage.c b/src/mainboard/google/volteer/romstage.c index d35bbb5..a8da340 100644 --- a/src/mainboard/google/volteer/romstage.c +++ b/src/mainboard/google/volteer/romstage.c @@ -31,6 +31,13 @@ if (fw_config_probe(FW_CONFIG(AUDIO, NONE))) mem_cfg->PchHdaEnable = 0;
+ /* If the DB is USB3 disable TBT on the platform */ + if (fw_config_probe(FW_CONFIG(DB_USB, USB3_ACTIVE)) || + fw_config_probe(FW_CONFIG(DB_USB, USB3_PASSIVE))) { + mem_cfg->TcssItbtPcie0En = 0; + mem_cfg->TcssItbtPcie1En = 0; + } + meminit_lpddr4x(mem_cfg, board_cfg, &spd_info, half_populated); }