Yu-Ping Wu has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46389 )
Change subject: mediatek/mt8192: add spmfw loader
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Patch Set 29:
(1 comment)
There're still unresolved comments in PS4
https://review.coreboot.org/c/coreboot/+/46389/29/src/soc/mediatek/mt8192/sp...
File src/soc/mediatek/mt8192/spm.c:
https://review.coreboot.org/c/coreboot/+/46389/29/src/soc/mediatek/mt8192/sp...
PS29, Line 421: con1 = read32(&mtk_spm->pcm_con1) & RG_PCM_WDT_WAKE_LSB;
: write32(&mtk_spm->pcm_con1,
: con1 | SPM_REGWR_CFG_KEY | REG_EVENT_LOCK_EN_LSB |
: REG_SPM_SRAM_ISOINT_B_LSB | RG_AHBMIF_APBEN_LSB |
: REG_MD32_APB_INTERNAL_EN_LSB);
The original code keeps PCM WDT setting from con1 only and assign new bits to con1 register. […]
Isn't this equivalent to the following?
clrsetbits32(&mtk_spm->pcm_con1, ~RG_PCM_WDT_WAKE_LSB,
SPM_REGWR_CFG_KEY | REG_EVENT_LOCK_EN_LSB |
REG_SPM_SRAM_ISOINT_B_LSB | RG_AHBMIF_APBEN_LSB |
REG_MD32_APB_INTERNAL_EN_LSB);
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