[coreboot-gerrit] Change in coreboot[master]: drivers/analogix: add MIPI rx flow

[jitao shi (Code Review)]

jitao shi has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/47381 )

Change subject: drivers/analogix: add MIPI rx flow
......................................................................

drivers/analogix: add MIPI rx flow

For some special platform, MIPI tx signal may stably output after
ANX7625 linux driver enable MIPI rx module. Thus, driver needs wait
some time till MIPI tx signal became stable. Based on the test
result, this patch delay maximum 800ms before release MIPI rx module.

Signed-off-by: Jitao Shi 
Change-Id: I6123a030dafb74b9da4e4a56adce3b5a0360d315
---
M src/drivers/analogix/anx7625/anx7625.c
1 file changed, 19 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/81/47381/1

diff --git a/src/drivers/analogix/anx7625/anx7625.c b/src/drivers/analogix/anx7625/anx7625.c
index 9f0b2e1..da72a2a 100644
--- a/src/drivers/analogix/anx7625/anx7625.c
+++ b/src/drivers/analogix/anx7625/anx7625.c
@@ -812,6 +812,23 @@
    	dt->vactive, dt->vsync_len, dt->vfront_porch, dt->vback_porch);
 }

+static void anx7625_mipi_rx_init(uint8_t bus)
+{
+	ANXINFO("***** mipi rx, dp tx initial start.\n");
+
+	mdelay(200);
+
+	/* reset MIPI-DSI RX digital block */
+	anx7625_reg_write(bus, RX_P1_ADDR, 0x0f, 0x00);
+
+	mdelay(600);
+
+	/* release MIPI-DSI RX digital block */
+	anx7625_reg_write(bus, RX_P1_ADDR, 0x0f, 0x80);
+
+	ANXINFO("***** mipi rx, dp tx initial finish.\n");
+}
+
 int anx7625_dp_start(uint8_t bus, const struct edid *edid)
 {
    int ret;
@@ -825,6 +842,8 @@
    else
    	ANXINFO("MIPI phy setup OK.\n");

+	anx7625_mipi_rx_init(bus);
+
    return ret;
 }