[coreboot-gerrit] [XS] Change in coreboot[main]: soc/intel/xeon_sp: Reserve MMIO range for VTd BAR dynamically

[Nico Huber (Code Review)]

Attention is currently required from: Christian Walter, Johnny Lin, Jonathan Zhang, Lean Sheng Tan, Patrick Rudolph, Shuo Liu, Tim Chu.

Nico Huber has posted comments on this change by Shuo Liu. ( https://review.coreboot.org/c/coreboot/+/82431?usp=email )

Change subject: soc/intel/xeon_sp: Reserve MMIO range for VTd BAR dynamically
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Patch Set 14:

(1 comment)

Commit Message:

https://review.coreboot.org/c/coreboot/+/82431/comment/021d22eb_a33aa09f?usp... :
PS12, Line 9: vtd_probe_bar_size is used to decide the BAR size.
> Hi Nico, Arthur, […]

I would try to avoid CB:82430. It looks like fragile complexity. Yet another
thing one would have to check for compatibility when adding a new chip.

Regarding weak or not, why not add a size parameter to acpi_create_dmar_drhd()?
To avoid any calling (back) of low level code. Function parameters are usually
the first choice for abstraction. If the caller knows it's 4KiB, they can just
pass that and it's obvious to the reader that this platform uses 4KiB. If it's
not known to the caller, they can call a probing function, pass the result to
acpi_create_dmar_drhd().