Edward O'Callaghan (eocallaghan@alterapraxis.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/7930
-gerrit
commit 717573fe359cfb3439e350ea68b193ac43e8703c Author: Edward O'Callaghan eocallaghan@alterapraxis.com Date: Fri Dec 26 18:14:45 2014 +1100
soc/samsung/exynos5250: Move MMU config into chipset support
Take configuration out of mainboard support into chipset support as per the FIXME.
Change-Id: I925a888044452950fc85b0c5cf21a5fee0b031ec Signed-off-by: Edward O'Callaghan eocallaghan@alterapraxis.com --- src/mainboard/google/daisy/mainboard.c | 9 +-------- src/soc/samsung/exynos5250/alternate_cbfs.c | 7 +++++++ src/soc/samsung/exynos5250/bootblock.c | 16 ++++++++++++++++ src/soc/samsung/exynos5250/cpu.h | 2 ++ src/soc/samsung/exynos5250/wakeup.c | 2 ++ 5 files changed, 28 insertions(+), 8 deletions(-)
diff --git a/src/mainboard/google/daisy/mainboard.c b/src/mainboard/google/daisy/mainboard.c index cf25967..3f9b49d 100644 --- a/src/mainboard/google/daisy/mainboard.c +++ b/src/mainboard/google/daisy/mainboard.c @@ -44,7 +44,6 @@ /* convenient shorthand (in MB) */ #define DRAM_START (CONFIG_SYS_SDRAM_BASE >> 20) #define DRAM_SIZE CONFIG_DRAM_SIZE_MB -#define DRAM_END (DRAM_START + DRAM_SIZE) /* plus one... */
/* Arbitrary range of DMA memory for depthcharge's drivers */ #define DMA_START (0x77300000) @@ -327,15 +326,9 @@ static void mainboard_enable(device_t dev) { dev->ops->init = &mainboard_init;
- /* set up dcache and MMU */ - /* FIXME: this should happen via resource allocator */ - exynos5250_config_l2_cache(); - mmu_init(); - mmu_config_range(0, DRAM_START, DCACHE_OFF); + /* set up caching for the DRAM */ mmu_config_range(DRAM_START, DRAM_SIZE, DCACHE_WRITEBACK); mmu_config_range(DMA_START >> 20, DMA_SIZE >> 20, DCACHE_OFF); - mmu_config_range(DRAM_END, 4096 - DRAM_END, DCACHE_OFF); - dcache_mmu_enable();
const unsigned epll_hz = 192000000; const unsigned sample_rate = 48000; diff --git a/src/soc/samsung/exynos5250/alternate_cbfs.c b/src/soc/samsung/exynos5250/alternate_cbfs.c index 10b33f0..d19098b 100644 --- a/src/soc/samsung/exynos5250/alternate_cbfs.c +++ b/src/soc/samsung/exynos5250/alternate_cbfs.c @@ -22,6 +22,7 @@ #include <cbfs.h> /* This driver serves as a CBFS media source. */ #include <stdlib.h> #include <string.h> +#include <arch/cache.h> #include <console/console.h> #include "alternate_cbfs.h" #include "power.h" @@ -53,10 +54,13 @@ static int usb_cbfs_open(struct cbfs_media *media) if (!first_run) return 0;
+ dcache_mmu_disable(); if (!irom_load_usb()) { + dcache_mmu_enable(); printk(BIOS_EMERG, "Unable to load CBFS image via USB!\n"); return -1; } + dcache_mmu_enable();
/* * We need to trust the host/irom to copy the image to our @@ -98,10 +102,13 @@ static int sdmmc_cbfs_open(struct cbfs_media *media) if (!first_run) return 0;
+ dcache_mmu_disable(); if (!irom_load_sdmmc(1, count, alternate_cbfs_buffer)) { + dcache_mmu_enable(); printk(BIOS_EMERG, "Unable to load CBFS image from SDMMC!\n"); return -1; } + dcache_mmu_enable();
printk(BIOS_DEBUG, "SDMMC read successful, CBFS image should now be" " at %p\n", alternate_cbfs_buffer); diff --git a/src/soc/samsung/exynos5250/bootblock.c b/src/soc/samsung/exynos5250/bootblock.c index f524399..602932a 100644 --- a/src/soc/samsung/exynos5250/bootblock.c +++ b/src/soc/samsung/exynos5250/bootblock.c @@ -18,9 +18,16 @@ */
#include <bootblock_common.h> +#include <arch/cache.h>
#include "clk.h" #include "wakeup.h" +#include "cpu.h" + +/* convenient shorthand (in MB) */ +#define SRAM_START (EXYNOS5_SRAM_BASE >> 20) +#define SRAM_SIZE 1 +#define SRAM_END (SRAM_START + SRAM_SIZE) /* plus one... */
void bootblock_cpu_init(void) { @@ -34,6 +41,15 @@ void bootblock_cpu_init(void) /* Never returns. */ }
+ exynos5250_config_l2_cache(); + + /* set up dcache and MMU */ + mmu_init(); + mmu_disable_range(0, SRAM_START); + mmu_config_range(SRAM_START, SRAM_SIZE, DCACHE_WRITEBACK); + mmu_config_range(SRAM_END, 4096 - SRAM_END, DCACHE_OFF); + dcache_mmu_enable(); + /* For most ARM systems, we have to initialize firmware media source * (ex, SPI, SD/MMC, or eMMC) now; but for Exynos platform, that is * already handled by iROM so there's no need to setup again. diff --git a/src/soc/samsung/exynos5250/cpu.h b/src/soc/samsung/exynos5250/cpu.h index 10f9ef4..a813dca 100644 --- a/src/soc/samsung/exynos5250/cpu.h +++ b/src/soc/samsung/exynos5250/cpu.h @@ -22,6 +22,8 @@
#include <arch/io.h>
+#define EXYNOS5_SRAM_BASE 0x02020000 + /* Base address registers */ #define EXYNOS5_GPIO_PART6_BASE 0x03860000 /* Z<6:0> */ #define EXYNOS5_PRO_ID 0x10000000 diff --git a/src/soc/samsung/exynos5250/wakeup.c b/src/soc/samsung/exynos5250/wakeup.c index b7161cf..a240717 100644 --- a/src/soc/samsung/exynos5250/wakeup.c +++ b/src/soc/samsung/exynos5250/wakeup.c @@ -17,6 +17,7 @@ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */
+#include <arch/cache.h> #include <console/console.h> #include "power.h" #include "wakeup.h" @@ -27,6 +28,7 @@ void wakeup(void) power_reset();
power_init(); /* Ensure ps_hold_setup() for early wakeup. */ + dcache_mmu_disable(); power_exit_wakeup(); /* Should never return. If we do, reset. */ power_reset();