Attention is currently required from: Hung-Te Lin, Rex-BC Chen, Paul Menzel, Angel Pons, Yu-Ping Wu.
Jianjun Wang has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/62933 )
Change subject: soc/mediatek: Add timestamp to measure PERST# time
......................................................................
Patch Set 4:
(1 comment)
File src/soc/mediatek/common/pcie.c:
https://review.coreboot.org/c/coreboot/+/62933/comment/345dbc30_fc434cea
PS3, Line 238: perst_time_us = mtk_pcie_perst_elapsed_time();
: printk(BIOS_DEBUG, "%s: %lld us elapsed since assert PERST#\n",
: __func__, perst_time_us);
:
: /*
: * Described in PCIe CEM specification sections 2.2
: * (PERST# Signal) and 2.2.1 (Initial Power-Up (G3 to S0)).
: * The deassertion of PERST# should be delayed 100ms (TPVPERL)
: * for the power and clock to become stable.
: */
: if (perst_time_us < 100000)
: printk(BIOS_WARNING, "%s: PERST# assert time %lld us may not enough for link up\n",
: __func__, perst_time_us);
:
I wonder if we can store the stopwatch (3x size of mono_time) in SRAM. […]
Is that ok to use udelay()?
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