[coreboot-gerrit] Change in coreboot[master]: cpu/x86/lapic: Fix SMP=n case with LEGACY_SMP_INIT

[Kyösti Mälkki (Code Review)]

Kyösti Mälkki has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/61793 )

Change subject: cpu/x86/lapic: Fix SMP=n case with LEGACY_SMP_INIT
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cpu/x86/lapic: Fix SMP=n case with LEGACY_SMP_INIT

Fix regression after commit 9ec7227c9b
  cpu/x86/lapic: Move LAPIC configuration to MP init

The call to disable_lapic() got removed and with asus/p2b
SeaBIOS payload was unable to load kernel.

The combination of entering SeaBIOS payload with an
enabled lapic but not having programmed LAPIC_LVT0
for DELIVERY_MODE_EXTINT apparently disconnects i8259
PIC interrupt delivery pin.

Change-Id: If51e5d65153a02ac7af191e7897c04bd4e298006
Signed-off-by: Kyösti Mälkki 
---
M src/cpu/x86/lapic/lapic_cpu_init.c
1 file changed, 2 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/93/61793/1

diff --git a/src/cpu/x86/lapic/lapic_cpu_init.c b/src/cpu/x86/lapic/lapic_cpu_init.c
index 837d32f..2cb8459 100644
--- a/src/cpu/x86/lapic/lapic_cpu_init.c
+++ b/src/cpu/x86/lapic/lapic_cpu_init.c
@@ -384,6 +384,8 @@
    if (is_smp_boot()) {
    	enable_lapic();
    	setup_lapic_interrupts();
+	} else {
+		disable_lapic();
    }

/* Get the device path of the boot CPU */