[coreboot-gerrit] [S] Change in coreboot[master]: vendorcode/mediatek/mt8195: More sure ucDoneFlg is initialized

[Arthur Heymans (Code Review)]

Arthur Heymans has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/74552 )

Change subject: vendorcode/mediatek/mt8195: More sure ucDoneFlg is initialized
......................................................................

vendorcode/mediatek/mt8195: More sure ucDoneFlg is initialized

One some codepaths ucDoneFlg is not initialized. This fixes a clang
warning.

Change-Id: I78aa2c711626b24f003f5c95b1c9598eaff7cb1b
Signed-off-by: Arthur Heymans 
---
M src/vendorcode/mediatek/mt8195/dramc/dramc_pi_calibration_api.c
1 file changed, 14 insertions(+), 1 deletion(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/52/74552/1

diff --git a/src/vendorcode/mediatek/mt8195/dramc/dramc_pi_calibration_api.c b/src/vendorcode/mediatek/mt8195/dramc/dramc_pi_calibration_api.c
index 96de0ad..702c65a 100644
--- a/src/vendorcode/mediatek/mt8195/dramc/dramc_pi_calibration_api.c
+++ b/src/vendorcode/mediatek/mt8195/dramc/dramc_pi_calibration_api.c
@@ -3066,7 +3066,7 @@

//U8 *uiLPDDR_O1_Mapping = NULL;
     //U32 u4value = 0, u4dq_o1 = 0 u4value1 = 0,  u4dq_o1_tmp[DQS_BYTE_NUMBER];
-    U8 byte_i, rank_i, ucDoneFlg;
+    U8 byte_i, rank_i, ucDoneFlg = 0;
     //S32 iDelay, ClockDelayMax;
     //U8 ucStatus[DQS_BYTE_NUMBER], ucdq_o1[DQS_BYTE_NUMBER], ucdq_o1_shift[DQS_BYTE_NUMBER]
     //U8 ucHW_cmp_raw_data, uccmp_result[DQS_BYTE_NUMBER];