Yidi Lin has submitted this change. ( https://review.coreboot.org/c/coreboot/+/85838?usp=email )
Change subject: soc/mediatek/mt8196: Fix MT6363 buck5 enablement ......................................................................
soc/mediatek/mt8196: Fix MT6363 buck5 enablement
The MT6363 buck5 API's mask and shift settings are incorrect, preventing the buck from being disabled. Resolve the issue by correcting these two values.
BUG=b:365445188 TEST=build pass, check buck5 is power off after calling the mt6363_enable_buck5 API.
Change-Id: I0af1e0582ae8fc1e219f3cce536aed9985108be5 Signed-off-by: Hope Wang hope.wang@mediatek.corp-partner.google.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/85838 Reviewed-by: Yu-Ping Wu yupingso@google.com Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Yidi Lin yidilin@google.com --- M src/soc/mediatek/common/mt6363.c 1 file changed, 1 insertion(+), 1 deletion(-)
Approvals: build bot (Jenkins): Verified Yu-Ping Wu: Looks good to me, approved Yidi Lin: Looks good to me, approved
diff --git a/src/soc/mediatek/common/mt6363.c b/src/soc/mediatek/common/mt6363.c index 691282b..20ef9f0 100644 --- a/src/soc/mediatek/common/mt6363.c +++ b/src/soc/mediatek/common/mt6363.c @@ -211,7 +211,7 @@
void mt6363_enable_buck5(bool enable) { - mt6363_write_field(PMIC_VBUCK5_OP_EN_2, enable, 0x7, 0); + mt6363_write_field(PMIC_VBUCK5_OP_EN_2, enable, 0x1, 7); }
void mt6363_enable_vcn15(bool enable)