the following patch was just integrated into master: commit d946f5e61d0c8966bec57f7d3961e41555b5299a Author: Kevin Hsieh kevin.hsieh@intel.com Date: Wed Nov 26 03:08:18 2014 +0800
Baytrail: Prior to PCI scan, wait for LCTL to be active in 50 ms
Using REG_PCI_POLL32 to check if the LINK is active with 50ms timeout.
BRANCH=none BUG=chromium:431169 TEST=Test on Enguarde, compile ok and boot OS
Change-Id: If98ab4e31d17ec4e62d68b93edcec6d9aee87367 Signed-off-by: Stefan Reinauer reinauer@chromium.org Original-Commit-Id: cf692ae9aebb43ab46cb07d36b62b300b16be1dc Original-Change-Id: I490e6ffa40979628edf52a7444808b6d25a6e83d Original-Signed-off-by: Kevin Hsieh kevin.hsieh@intel.com Original-Reviewed-on: https://chromium-review.googlesource.com/231777 Original-Reviewed-by: Shawn Nematbakhsh shawnn@chromium.org Reviewed-on: http://review.coreboot.org/9478 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi pgeorgi@google.com
See http://review.coreboot.org/9478 for details.
-gerrit