[coreboot-gerrit] Change in coreboot[master]: mb/google/brya/var/vell: Tune I2C1/I2C7 bus speed for 1 MHz

[Felix Held (Code Review)]

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/63241 )

Change subject: mb/google/brya/var/vell: Tune I2C1/I2C7 bus speed for 1 MHz
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mb/google/brya/var/vell: Tune I2C1/I2C7 bus speed for 1 MHz

Tune I2C parameters to make sure I2C1 and I2C7 bus speed is around 1MHz.

BUG=b:207333035
BRANCH=none
TEST=built and verified adjusted I2C speed around 1MHz

Change-Id: I09a9edf723bb1198bbf5d71248abc07276cd94ff
Signed-off-by: Eddy Lu 
Reviewed-on: https://review.coreboot.org/c/coreboot/+/63241
Reviewed-by: Tim Wawrzynczak 
Tested-by: build bot (Jenkins) 
---
M src/mainboard/google/brya/variants/vell/overridetree.cb
1 file changed, 20 insertions(+), 0 deletions(-)

Approvals:
  build bot (Jenkins): Verified
  Tim Wawrzynczak: Looks good to me, approved
  Eddy Lu: Looks good to me, but someone else must approve

diff --git a/src/mainboard/google/brya/variants/vell/overridetree.cb b/src/mainboard/google/brya/variants/vell/overridetree.cb
index 6ffffcf..b12a00d 100644
--- a/src/mainboard/google/brya/variants/vell/overridetree.cb
+++ b/src/mainboard/google/brya/variants/vell/overridetree.cb
@@ -36,6 +36,15 @@
    #| I2C5              | Trackpad                  |
    #+-------------------+---------------------------+
    register "common_soc_config" = "{
+		.i2c[0] = {
+			.speed = I2C_SPEED_FAST_PLUS,
+			.speed_config[0] = {
+				.speed = I2C_SPEED_FAST_PLUS,
+				.scl_lcnt = 45,
+				.scl_hcnt = 33,
+				.sda_hold = 20,
+			},
+		},
    	.i2c[1] = {
    		.early_init = 1,
    		.speed = I2C_SPEED_FAST,
@@ -48,6 +57,15 @@
    		.fall_time_ns = 400,
    		.data_hold_time_ns = 50,
    	},
+		.i2c[7] = {
+			.speed = I2C_SPEED_FAST_PLUS,
+			.speed_config[0] = {
+				.speed = I2C_SPEED_FAST_PLUS,
+				.scl_lcnt = 45,
+				.scl_hcnt = 30,
+				.sda_hold = 20,
+			},
+		},
    }"
    register "usb2_ports[4]" = "USB2_PORT_TYPE_C(OC3)"  # USB2_C3
    register "usb2_ports[6]" = "USB2_PORT_MID(OC_SKIP)"
@@ -61,6 +79,7 @@
    	[PchSerialIoIndexI2C3] = PchSerialIoPci,
    	[PchSerialIoIndexI2C4] = PchSerialIoDisabled,
    	[PchSerialIoIndexI2C5] = PchSerialIoPci,
+		[PchSerialIoIndexI2C7] = PchSerialIoPci,
    }"
    device domain 0 on
    	device ref igpu on
@@ -334,6 +353,7 @@
    			device i2c 15 on end
    		end
    	end
+		device ref i2c7 on end
    	device ref gspi1 on
    		chip drivers/spi/acpi
    			register "name" = ""CRFP""