[coreboot-gerrit] Change in coreboot[master]: soc/intel/alderlake: Implement PMC feature lock

[Subrata Banik (Code Review)]

Attention is currently required from: Tim Wawrzynczak, Angel Pons, Arthur Heymans, Nick Vaccaro, Eric Lai, Lean Sheng Tan, Werner Zeh.
Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63691 )

Change subject: soc/intel/alderlake: Implement PMC feature lock
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Patch Set 4:

(1 comment)

File src/soc/intel/alderlake/lockdown.c:

https://review.coreboot.org/c/coreboot/+/63691/comment/ecdaef5f_afe6af60 
PS4, Line 28: 		setbits32(pmc_mmio_regs() + PM_CFG, PM_CFG_DBG_MODE_LOCK |
> Will add more settings? Maybe create a structure to maintain it? If just 3, it's fine.

actually I have thought of adding a structure of this entire function as we are just doing the `setbits32()` .

Something like this https://github.com/coreboot/coreboot/blob/master/src/soc/intel/common/block/...

but we have several `if` clauses to skip the programmed hence, need to add a `skip` variable as well part of the structure, it would make it complicated eventually and as Arthur said in one CL, having a `skip` structure variable might not serve well the compiler optimisation part.

WDYT about this.