Attention is currently required from: Anilkumar N, Maulik V Vaghela, Kangheui Won, Tim Wawrzynczak, Rizwan Qureshi, Subrata Banik, Sridhar Siricilla, Krishna P Bhat D, Usha P.
Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59937 )
Change subject: mb/intel/adlrvp: Configure GPIOs for Alder Lake-N
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Patch Set 10:
(1 comment)
File src/mainboard/intel/adlrvp/gpio_n.c:
https://review.coreboot.org/c/coreboot/+/59937/comment/0daccea1_3268a90b
PS10, Line 8: static
Hi Subrata, Currently I have clubbed the GPIOs based on ports which would help us while debugging.
Sorry, didn't get your point. Can you please help me to understand "clubbed the GPIOs based on ports"?
I believe you meant "feature wise" like all ESPI GPIOs are clubbed together, same for TCSS etc.
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