Zhuohao Lee has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/42185 )
Change subject: palkia: separate the gpio pins control for the second touch ......................................................................
palkia: separate the gpio pins control for the second touch
We use the different gpio pins to control the second touch, so we need to modify the devicetree to adopt this change. With this change, we can control the primary touch controller and secondary touch controller respectively.
BUG=b:149714955 TEST=touch works correctly
Change-Id: I1f896e334e51c78300af724cbef8d57641ae5612 Signed-off-by: Zhuohao Lee zhuohao@chromium.org --- M src/mainboard/google/hatch/variants/palkia/gpio.c M src/mainboard/google/hatch/variants/palkia/overridetree.cb 2 files changed, 7 insertions(+), 3 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/85/42185/1
diff --git a/src/mainboard/google/hatch/variants/palkia/gpio.c b/src/mainboard/google/hatch/variants/palkia/gpio.c index 04f1d85..ff02b25 100644 --- a/src/mainboard/google/hatch/variants/palkia/gpio.c +++ b/src/mainboard/google/hatch/variants/palkia/gpio.c @@ -45,6 +45,10 @@ /* C23 : UART2_CTS# ==> NC */ PAD_NC(GPP_C23, NONE),
+ /* D4 : USI_BASE_REPORT_EN */ + PAD_CFG_GPO(GPP_D4, 0, DEEP), + /* D10 : GPP_D10 ==> EN_PP3300_DX_TOUCHSCREEN */ + PAD_CFG_GPO(GPP_D10, 0, DEEP), /* D16 : USI_INT_L */ PAD_CFG_GPI_APIC(GPP_D16, NONE, PLTRST, LEVEL, INVERT),
diff --git a/src/mainboard/google/hatch/variants/palkia/overridetree.cb b/src/mainboard/google/hatch/variants/palkia/overridetree.cb index 31017bc..7de423b 100644 --- a/src/mainboard/google/hatch/variants/palkia/overridetree.cb +++ b/src/mainboard/google/hatch/variants/palkia/overridetree.cb @@ -76,7 +76,7 @@ device usb 2.5 off end end chip drivers/usb/acpi - # No Right Tpype-C port + # No Right Type-C port device usb 3.1 off end end chip drivers/usb/acpi @@ -136,12 +136,12 @@ "ACPI_IRQ_EDGE_LOW(GPP_C7_IRQ)" register "generic.probed" = "1" register "generic.enable_gpio" = - "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_D9)" + "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_D10)" register "generic.enable_delay_ms" = "12" register "generic.enable_off_delay_ms" = "10" register "generic.has_power_resource" = "1" register "generic.stop_gpio" = - "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_C4)" + "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_D4)" register "generic.stop_delay_ms" = "15" register "generic.stop_off_delay_ms" = "5" register "hid_desc_reg_offset" = "0x01"