Attention is currently required from: Arthur Heymans, Paul Menzel, Subrata Banik, Tarun Tuli.
Hello Paul Menzel, Subrata Banik, Tarun Tuli, build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/75756?usp=email
to look at the new patch set (#7).
The following approvals got outdated and were removed: Verified+1 by build bot (Jenkins)
Change subject: arch/x86: Introduce DUMP_SMBIOS_TYPE17 config ......................................................................
arch/x86: Introduce DUMP_SMBIOS_TYPE17 config
DDR5 spd is not supported read by coreboot. But FSP can read it, so print the memory information from smbios type17 dimm information.
TEST=check the coreboot log. memory Channel-0-DIMM-0 type is DDR5 memory part number is MTC8C1084S1SC56BG1 memory max speed is 5600 MT/s memory speed is 5200 MT/s memory size is 16384 MiB
Signed-off-by: Eric Lai eric_lai@quanta.corp-partner.google.com Change-Id: I2b5ca1f4a59598531a6cba500672c2717f2a7b00 --- M src/arch/x86/Kconfig M src/arch/x86/smbios.c 2 files changed, 72 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/56/75756/7