EricR Lai has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/41761 )
Change subject: mb/google/volteer: remove mainboard.asl ......................................................................
mb/google/volteer: remove mainboard.asl
EGPM and RGPM are come after mainboard hook function MS0X and MPTS/MWAK. In CB:41712 is implemented EGPM and RGPM. So used the SoC level functions instead board level functions. Otherwise it will have side effects which is always store the MISCCFG_ENABLE_GPIO_PM_CONFIG and restore it.
BUG=b:157280323 TEST=Check GPIO PM bits when enter/exit s0ix are expected
Signed-off-by: Eric Lai ericr_lai@compal.corp-partner.google.com Change-Id: Ic87d4860af35296a659623043301da5520204c11 --- M src/mainboard/google/volteer/dsdt.asl D src/mainboard/google/volteer/mainboard.asl 2 files changed, 0 insertions(+), 49 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/61/41761/1
diff --git a/src/mainboard/google/volteer/dsdt.asl b/src/mainboard/google/volteer/dsdt.asl index fa39e79..9a76d0a 100644 --- a/src/mainboard/google/volteer/dsdt.asl +++ b/src/mainboard/google/volteer/dsdt.asl @@ -32,8 +32,6 @@ #include <soc/intel/tigerlake/acpi/southbridge.asl> #include <soc/intel/tigerlake/acpi/tcss.asl> } - /* Mainboard hooks */ - #include "mainboard.asl" }
// Chrome OS specific diff --git a/src/mainboard/google/volteer/mainboard.asl b/src/mainboard/google/volteer/mainboard.asl deleted file mode 100644 index c360fcf..0000000 --- a/src/mainboard/google/volteer/mainboard.asl +++ /dev/null @@ -1,47 +0,0 @@ -/* - * - * SPDX-License-Identifier: GPL-2.0-or-later - */ - -#include <intelblocks/gpio.h> - -Method (PGPM, 1, Serialized) -{ - For (Local0 = 0, Local0 < 6, Local0++) - { - _SB.PCI0.CGPM (Local0, Arg0) - } -} - -/* - * Method called from _PTS prior to system sleep state entry - * Enables dynamic clock gating for all 5 GPIO communities - */ -Method (MPTS, 1, Serialized) -{ - PGPM (MISCCFG_ENABLE_GPIO_PM_CONFIG) -} - -/* - * Method called from _WAK prior to system sleep state wakeup - * Disables dynamic clock gating for all 5 GPIO communities - */ -Method (MWAK, 1, Serialized) -{ - PGPM (0) -} - -/* - * S0ix Entry/Exit Notifications - * Called from _SB.LPID._DSM - */ -Method (MS0X, 1, Serialized) -{ - If (Arg0 == 1) { - /* S0ix Entry */ - PGPM (MISCCFG_ENABLE_GPIO_PM_CONFIG) - } Else { - /* S0ix Exit */ - PGPM (0) - } -}