Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/42062 )
Change subject: src/*: Update makefiles to exclude x86 code from psp-verstage ......................................................................
src/*: Update makefiles to exclude x86 code from psp-verstage
The assumption up to this point was that if the system had an x86 processor, verstage would be running on the x86 processor. With running verstage on the PSP, that assumption no longer holds true, so exclude pieces of code that cause problems for verstage on the PSP.
This change will add these files to verstage only if the verstage architecture is X86 - either 32 or 64 bit.
BUG=b:158124527 TEST=Build and boot on Trembyle
Signed-off-by: Martin Roth martin@coreboot.org Change-Id: I797b67394825172bd44ad1ee693a0c509289486b Reviewed-on: https://review.coreboot.org/c/coreboot/+/42062 Reviewed-by: Felix Held felix-coreboot@felixheld.de Reviewed-by: Eric Peers epeers@google.com Reviewed-by: Rob Barnes robbarnes@google.com Tested-by: build bot (Jenkins) no-reply@coreboot.org --- M Makefile.inc M src/cpu/x86/lapic/Makefile.inc M src/cpu/x86/mtrr/Makefile.inc M src/cpu/x86/pae/Makefile.inc M src/cpu/x86/tsc/Makefile.inc M src/drivers/pc80/pc/Makefile.inc M src/soc/amd/common/block/acpi/Makefile.inc M src/soc/amd/common/block/alink/Makefile.inc M src/soc/amd/common/block/pci/Makefile.inc 9 files changed, 20 insertions(+), 9 deletions(-)
Approvals: build bot (Jenkins): Verified Felix Held: Looks good to me, approved Eric Peers: Looks good to me, but someone else must approve Rob Barnes: Looks good to me, but someone else must approve
diff --git a/Makefile.inc b/Makefile.inc index 86335d9..7f61a5e 100644 --- a/Makefile.inc +++ b/Makefile.inc @@ -99,6 +99,13 @@ $(call add-special-class,all) all-handler = $(foreach class,bootblock verstage romstage postcar ramstage,$(eval $(class)-y += $(2)))
+$(call add-special-class,verstage_x86) +ifeq ($(CONFIG_ARCH_VERSTAGE_X86_32)$(CONFIG_ARCH_VERSTAGE_X86_64),y) +verstage_x86-handler = $(eval verstage-y += $(2)) +else +verstage_x86-handler = +endif + # Add dynamic classes for rmodules $(foreach supported_arch,$(ARCH_SUPPORTED), \ $(eval $(call define_class,rmodules_$(supported_arch),$(supported_arch)))) diff --git a/src/cpu/x86/lapic/Makefile.inc b/src/cpu/x86/lapic/Makefile.inc index 0d11478..ea16014 100644 --- a/src/cpu/x86/lapic/Makefile.inc +++ b/src/cpu/x86/lapic/Makefile.inc @@ -6,7 +6,7 @@ ramstage-$(CONFIG_UDELAY_LAPIC) += apic_timer.c postcar-$(CONFIG_UDELAY_LAPIC) += apic_timer.c bootblock-y += boot_cpu.c -verstage-y += boot_cpu.c +verstage_x86-y += boot_cpu.c romstage-y += boot_cpu.c ramstage-y += boot_cpu.c postcar-y += boot_cpu.c diff --git a/src/cpu/x86/mtrr/Makefile.inc b/src/cpu/x86/mtrr/Makefile.inc index 129d05d..3f33e31 100644 --- a/src/cpu/x86/mtrr/Makefile.inc +++ b/src/cpu/x86/mtrr/Makefile.inc @@ -2,7 +2,7 @@
romstage-y += earlymtrr.c bootblock-y += earlymtrr.c -verstage-y += earlymtrr.c +verstage_x86-y += earlymtrr.c
bootblock-y += debug.c romstage-y += debug.c @@ -10,4 +10,4 @@ ramstage-y += debug.c
bootblock-$(CONFIG_SETUP_XIP_CACHE) += xip_cache.c -verstage-$(CONFIG_SETUP_XIP_CACHE) += xip_cache.c +verstage_x86-$(CONFIG_SETUP_XIP_CACHE) += xip_cache.c diff --git a/src/cpu/x86/pae/Makefile.inc b/src/cpu/x86/pae/Makefile.inc index 62176d2..70e0b2f 100644 --- a/src/cpu/x86/pae/Makefile.inc +++ b/src/cpu/x86/pae/Makefile.inc @@ -1,5 +1,5 @@ bootblock-y += pgtbl.c -verstage-y += pgtbl.c +verstage_x86-y += pgtbl.c romstage-y += pgtbl.c postcar-y += pgtbl.c ramstage-y += pgtbl.c diff --git a/src/cpu/x86/tsc/Makefile.inc b/src/cpu/x86/tsc/Makefile.inc index b3925b5..a0cd145 100644 --- a/src/cpu/x86/tsc/Makefile.inc +++ b/src/cpu/x86/tsc/Makefile.inc @@ -1,6 +1,6 @@ bootblock-$(CONFIG_UDELAY_TSC) += delay_tsc.c ramstage-$(CONFIG_UDELAY_TSC) += delay_tsc.c romstage-$(CONFIG_UDELAY_TSC) += delay_tsc.c -verstage-$(CONFIG_UDELAY_TSC) += delay_tsc.c +verstage_x86-$(CONFIG_UDELAY_TSC) += delay_tsc.c postcar-$(CONFIG_UDELAY_TSC) += delay_tsc.c smm-$(CONFIG_UDELAY_TSC) += delay_tsc.c diff --git a/src/drivers/pc80/pc/Makefile.inc b/src/drivers/pc80/pc/Makefile.inc index 67c40a1..63ed998 100644 --- a/src/drivers/pc80/pc/Makefile.inc +++ b/src/drivers/pc80/pc/Makefile.inc @@ -7,7 +7,7 @@ romstage-$(CONFIG_SPKMODEM) += spkmodem.c
bootblock-y += i8254.c -verstage-y += i8254.c +verstage_x86-y += i8254.c romstage-y += i8254.c ramstage-y += i8254.c postcar-y += i8254.c diff --git a/src/soc/amd/common/block/acpi/Makefile.inc b/src/soc/amd/common/block/acpi/Makefile.inc index 708631a..f0b336d 100644 --- a/src/soc/amd/common/block/acpi/Makefile.inc +++ b/src/soc/amd/common/block/acpi/Makefile.inc @@ -1,5 +1,5 @@ bootblock-$(CONFIG_SOC_AMD_COMMON_BLOCK_ACPI) += acpi.c -verstage-$(CONFIG_SOC_AMD_COMMON_BLOCK_ACPI) += acpi.c +verstage_x86-$(CONFIG_SOC_AMD_COMMON_BLOCK_ACPI) += acpi.c romstage-$(CONFIG_SOC_AMD_COMMON_BLOCK_ACPI) += acpi.c ramstage-$(CONFIG_SOC_AMD_COMMON_BLOCK_ACPI) += acpi.c postcar-$(CONFIG_SOC_AMD_COMMON_BLOCK_ACPI) += acpi.c diff --git a/src/soc/amd/common/block/alink/Makefile.inc b/src/soc/amd/common/block/alink/Makefile.inc index 720a7cb..9d27aec 100644 --- a/src/soc/amd/common/block/alink/Makefile.inc +++ b/src/soc/amd/common/block/alink/Makefile.inc @@ -1,5 +1,5 @@ bootblock-$(CONFIG_SOC_AMD_COMMON_BLOCK_ALINK) += alink.c -verstage-$(CONFIG_SOC_AMD_COMMON_BLOCK_ALINK) += alink.c +verstage_x86-$(CONFIG_SOC_AMD_COMMON_BLOCK_ALINK) += alink.c romstage-$(CONFIG_SOC_AMD_COMMON_BLOCK_ALINK) += alink.c postcar-$(CONFIG_SOC_AMD_COMMON_BLOCK_ALINK) += alink.c ramstage-$(CONFIG_SOC_AMD_COMMON_BLOCK_ALINK) += alink.c diff --git a/src/soc/amd/common/block/pci/Makefile.inc b/src/soc/amd/common/block/pci/Makefile.inc index 558a7ac..baebb6c 100644 --- a/src/soc/amd/common/block/pci/Makefile.inc +++ b/src/soc/amd/common/block/pci/Makefile.inc @@ -1,4 +1,8 @@
ramstage-$(CONFIG_SOC_AMD_COMMON_BLOCK_PCI) += amd_pci_util.c
-all-y += amd_pci_mmconf.c +bootblock-y += amd_pci_mmconf.c +verstage_x86-y += amd_pci_mmconf.c +romstage-y += amd_pci_mmconf.c +postcar-y += amd_pci_mmconf.c +ramstage-y += amd_pci_mmconf.c