Kyösti Mälkki has submitted this change and it was merged. ( https://review.coreboot.org/c/coreboot/+/31935 )
Change subject: mb/foxconn/g41m: Fix overridetree ......................................................................
mb/foxconn/g41m: Fix overridetree
The .chip_info field of PNP devices in overridetree incorrectly pointed to southbridge config structure in generated static.c files.
Change-Id: If507c8ea9c865ff86e127226b93a8579bcf39d8d Signed-off-by: Kyösti Mälkki kyosti.malkki@gmail.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/31935 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Arthur Heymans arthur@aheymans.xyz Reviewed-by: Angel Pons th3fanbus@gmail.com --- M src/mainboard/foxconn/g41s-k/variants/g41m/overridetree.cb 1 file changed, 8 insertions(+), 6 deletions(-)
Approvals: build bot (Jenkins): Verified Arthur Heymans: Looks good to me, approved Angel Pons: Looks good to me, approved
diff --git a/src/mainboard/foxconn/g41s-k/variants/g41m/overridetree.cb b/src/mainboard/foxconn/g41s-k/variants/g41m/overridetree.cb index 45ae897..96e11e3 100644 --- a/src/mainboard/foxconn/g41s-k/variants/g41m/overridetree.cb +++ b/src/mainboard/foxconn/g41s-k/variants/g41m/overridetree.cb @@ -3,13 +3,15 @@ subsystemid 0x105b 0x0dc0 inherit chip southbridge/intel/i82801gx # Southbridge device pci 1f.0 on # ISA bridge - device pnp 2e.0 on # Floppy - io 0x60 = 0x3f0 - irq 0x70 = 6 - drq 0x74 = 2 + chip superio/ite/it8720f # Super I/O + device pnp 2e.0 on # Floppy + io 0x60 = 0x3f0 + irq 0x70 = 6 + drq 0x74 = 2 + end + device pnp 2e.2 off end # COM2 (IR) + device pnp 2e.a off end # CIR end - device pnp 2e.2 off end # COM2 (IR) - device pnp 2e.a off end # CIR end device pci 1f.1 on end # PATA/IDE end