Attention is currently required from: Hannah Williams, Jay Patel, Jérémy Compostella, Subrata Banik, Tarun Tuli, Wonkyu Kim.
Subrata Banik has uploaded a new patch set (#3) to the change originally created by Jay Patel. ( https://review.coreboot.org/c/coreboot/+/75566?usp=email )
Change subject: soc/intel/meteorlake: Add provision to override the Fast Vmode ......................................................................
soc/intel/meteorlake: Add provision to override the Fast Vmode
This patch adds option to override Fast Vmode on Meteor Lake SoC. This requires CepEnable, EnableFastVmode, IccLimit FSPM UPDs in FSP header. If the hardware supports Fast Vmode, the FSPM will set the ICC limit value to the value passed from coreboot.
If no value is passed by coreboot and FSPM will set all 0's i.e. disabled.
BUG=b:286809233 TEST=In debug MTL FSP logs, the value of FSP parameters is as passed from coreboot including enable_fast_vmode, cep_enable, and fast_vmode_i_trip. Also, fast_vmode_i_trip value is passed to pcode using mailbox command without any error. This test done on google/rex board.
Signed-off-by: Jay Patel jay2.patel@intel.com Change-Id: Id05dccac56c504523f9327babe0c6fbeff488ec2 --- M src/soc/intel/meteorlake/chip.h M src/soc/intel/meteorlake/romstage/fsp_params.c 2 files changed, 52 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/66/75566/3