[coreboot-gerrit] Change in coreboot[master]: soc/intel/common/gpio_defs: Remove PAD_CFG_NF_BUF_TRIG

[Maxim Polyakov (Code Review)]

Maxim Polyakov has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/43569 )

Change subject: soc/intel/common/gpio_defs: Remove PAD_CFG_NF_BUF_TRIG
......................................................................

soc/intel/common/gpio_defs: Remove PAD_CFG_NF_BUF_TRIG

This macro is not correct because the RX Level/Edge Configuration
(trig) and the GPIO Tx/Rx Buffer Disable (bufdis) fields in DW0
register do not affect on the pad in the native function mode.

Change-Id: Ic0416e3f67016c648f0886df73f585e8a08d4e92
Signed-off-by: Maxim Polyakov 
---
M Documentation/getting_started/gpio.md
M src/soc/intel/common/block/include/intelblocks/gpio_defs.h
2 files changed, 0 insertions(+), 14 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/69/43569/1

diff --git a/Documentation/getting_started/gpio.md b/Documentation/getting_started/gpio.md
index 81a06eb..13aeed5 100644
--- a/Documentation/getting_started/gpio.md
+++ b/Documentation/getting_started/gpio.md
@@ -88,11 +88,6 @@
 ```C
     /* Native function configuration */
     #define PAD_CFG_NF(pad, pull, rst, func)
-    /*
-     * Set native function with RX Level/Edge configuration and disable
-     * input/output buffer if necessary
-     */
-    #define PAD_CFG_NF_BUF_TRIG(pad, pull, rst, func, bufdis, trig)
     /* General purpose output, no pullup/down. */
     #define PAD_CFG_GPO(pad, val, rst)
     /* General purpose output, with termination specified */
diff --git a/src/soc/intel/common/block/include/intelblocks/gpio_defs.h b/src/soc/intel/common/block/include/intelblocks/gpio_defs.h
index 1ff0b2c..52a84c2 100644
--- a/src/soc/intel/common/block/include/intelblocks/gpio_defs.h
+++ b/src/soc/intel/common/block/include/intelblocks/gpio_defs.h
@@ -184,15 +184,6 @@
    _PAD_CFG_STRUCT(pad, PAD_RESET(rst) | PAD_FUNC(func), PAD_PULL(pull) | \
    	PAD_IOSSTATE(TxLASTRxE))

-/*
- * Set native function with RX Level/Edge configuration and disable
- * input/output buffer if necessary
- */
-#define PAD_CFG_NF_BUF_TRIG(pad, pull, rst, func, bufdis, trig) \
-	_PAD_CFG_STRUCT(pad, PAD_RESET(rst) | PAD_TRIG(trig) | \
-		PAD_BUF(bufdis) | PAD_FUNC(func), \
-		PAD_PULL(pull) | PAD_IOSSTATE(TxLASTRxE))
-
 #if CONFIG(SOC_INTEL_COMMON_BLOCK_GPIO_PADCFG_PADTOL)
 /* Native 1.8V tolerant pad, only applies to some pads like I2C/I2S
     Not applicable to all SOCs. Refer EDS