[coreboot-gerrit] Patch merged into coreboot/master: Intel common: add microcode loading to romstage before fspmemoryinit

the following patch was just integrated into master:
commit 13a2e949d5970b9ff09cdd7d8a3943f111538d83
Author: robbie zhang 
Date:   Wed Feb 10 11:40:11 2016 -0800

Intel common: add microcode loading to romstage before fspmemoryinit

The intend is to seek upgraded microcode in RW section and load it
    before Fsp memoryinit, to ensure any goodness in the microcode update,
    especially related to memory configuration, can be applied earlier.

BUG=chrome-os-partner:50132
    BRANCH=glados
    TEST=Built and boot on kunimintus. Verified microcode gets reloaded.
         Boot time impact is very minor.
    CQ-DEPEND=CL:327170

Change-Id: I1a5df1d1efa25fb256743dca6a661c828263ec7c
    Signed-off-by: Patrick Georgi 
    Original-Commit-Id: d7f700c1876e53194748d1d1c66637b9419b7086
    Original-Change-Id: I7083ec6305af9e14a57d7b0cb1bd800cd9e22f44
    Original-Signed-off-by: Robbie Zhang 
    Original-Reviewed-on: https://chromium-review.googlesource.com/327193
    Original-Tested-by: Wenkai Du 
    Original-Reviewed-by: Aaron Durbin 
    Reviewed-on: https://review.coreboot.org/13688
    Tested-by: build bot (Jenkins)
    Reviewed-by: Robbie Zhang 
    Reviewed-by: Leroy P Leahy

See https://review.coreboot.org/13688 for details.

-gerrit