[coreboot-gerrit] Change in ...coreboot[master]: soc/intel/cannonlake: Add a config for configuring SD_VDD1_PWR_EN#

[Rizwan Qureshi (Code Review)]

Rizwan Qureshi has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/31445 )

Change subject: soc/intel/cannonlake: Add a config for configuring SD_VDD1_PWR_EN#
......................................................................

Patch Set 9:

(1 comment)

https://review.coreboot.org/#/c/31445/2/src/soc/intel/cannonlake/acpi/scs.as... 
File src/soc/intel/cannonlake/acpi/scs.asl:

https://review.coreboot.org/#/c/31445/2/src/soc/intel/cannonlake/acpi/scs.as... 
PS2, Line 134: 			CTXS(SD_PWR_EN_PIN)
> The output buffer was just an example. I haven't looked into […]

Tx buffer should be sufficient in this case.