HAOUAS Elyes has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/40368 )
Change subject: nb/i945: Reorder sdram_setup_processor_side() ......................................................................
nb/i945: Reorder sdram_setup_processor_side()
Change-Id: Ida21eb648f92ff0545dc0ce4da3aa9135b1260a9 Signed-off-by: Elyes HAOUAS ehaouas@noos.fr --- M src/northbridge/intel/i945/raminit.c 1 file changed, 3 insertions(+), 4 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/68/40368/1
diff --git a/src/northbridge/intel/i945/raminit.c b/src/northbridge/intel/i945/raminit.c index 329914e..dad1cb2 100644 --- a/src/northbridge/intel/i945/raminit.c +++ b/src/northbridge/intel/i945/raminit.c @@ -2714,13 +2714,12 @@
static void sdram_setup_processor_side(void) { - if (i945_silicon_revision() == 0) + if (i945_silicon_revision() == 0) { MCHBAR32(FSBPMC3) |= (1 << 2); + MCHBAR32(SLPCTL) |= (1 << 8); + }
MCHBAR8(0xb00) |= 1; - - if (i945_silicon_revision() == 0) - MCHBAR32(SLPCTL) |= (1 << 8); }
/**