Subrata Banik has submitted this change. ( https://review.coreboot.org/c/coreboot/+/83514?usp=email )
Change subject: device/pci_ids: Add new Intel PTL device IDs for P2SBx ......................................................................
device/pci_ids: Add new Intel PTL device IDs for P2SBx
This patch adds new P2SBx PCI device IDs for Intel PTL-U and PTL-H.
Additionally, updates the P2SBx driver's `pci_device_ids` list to include these new IDs.
Source: Intel PTL-EDS vol 1. Document Number 815002, Rev 0.51 Chapter 2
BUG=b:347669091 TEST=Able to build google/fatcat.
Change-Id: Ie1c36bc1c014bb1e219afe0cafb6c9941f253b0c Signed-off-by: Subrata Banik subratabanik@google.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/83514 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Angel Pons th3fanbus@gmail.com Reviewed-by: Eric Lai ericllai@google.com --- M src/include/device/pci_ids.h M src/soc/intel/common/block/p2sb/ioe_p2sb.c M src/soc/intel/common/block/p2sb/p2sb.c 3 files changed, 8 insertions(+), 2 deletions(-)
Approvals: build bot (Jenkins): Verified Angel Pons: Looks good to me, but someone else must approve Eric Lai: Looks good to me, approved
diff --git a/src/include/device/pci_ids.h b/src/include/device/pci_ids.h index 5fa478f..6d3911f 100644 --- a/src/include/device/pci_ids.h +++ b/src/include/device/pci_ids.h @@ -4530,8 +4530,10 @@ #define PCI_DID_INTEL_RPP_S_P2SB 0x7a20 #define PCI_DID_INTEL_LNL_P2SB 0xa820 #define PCI_DID_INTEL_LNL_P2SB2 0xa84c -#define PCI_DID_INTEL_PTL_P2SB 0xe420 -#define PCI_DID_INTEL_PTL_P2SB2 0xe44c +#define PCI_DID_INTEL_PTL_H_P2SB 0xe420 +#define PCI_DID_INTEL_PTL_H_P2SB2 0xe44c +#define PCI_DID_INTEL_PTL_U_H_P2SB 0xe320 +#define PCI_DID_INTEL_PTL_U_H_P2SB2 0xe34c
/* Intel SRAM device Ids */ #define PCI_DID_INTEL_APL_SRAM 0x5aec diff --git a/src/soc/intel/common/block/p2sb/ioe_p2sb.c b/src/soc/intel/common/block/p2sb/ioe_p2sb.c index 769b853..3f45e69 100644 --- a/src/soc/intel/common/block/p2sb/ioe_p2sb.c +++ b/src/soc/intel/common/block/p2sb/ioe_p2sb.c @@ -37,6 +37,8 @@ };
static const unsigned short pci_device_ids[] = { + PCI_DID_INTEL_PTL_H_P2SB2, + PCI_DID_INTEL_PTL_U_H_P2SB2, PCI_DID_INTEL_MTL_IOE_M_P2SB, PCI_DID_INTEL_MTL_IOE_P_P2SB, 0, diff --git a/src/soc/intel/common/block/p2sb/p2sb.c b/src/soc/intel/common/block/p2sb/p2sb.c index e348501..16f78da 100644 --- a/src/soc/intel/common/block/p2sb/p2sb.c +++ b/src/soc/intel/common/block/p2sb/p2sb.c @@ -137,6 +137,8 @@ };
static const unsigned short pci_device_ids[] = { + PCI_DID_INTEL_PTL_H_P2SB, + PCI_DID_INTEL_PTL_U_H_P2SB, PCI_DID_INTEL_LNL_P2SB, PCI_DID_INTEL_MTL_SOC_P2SB, PCI_DID_INTEL_RPP_P_P2SB,