[coreboot-gerrit] Change in coreboot[master]: soc/intel/common/gpio: Perform GPIO PAD lock outside SMM

[Subrata Banik (Code Review)]

Subrata Banik has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/60801 )

Change subject: soc/intel/common/gpio: Perform GPIO PAD lock outside SMM
......................................................................

soc/intel/common/gpio: Perform GPIO PAD lock outside SMM

This patch performs GPIO PAD lock configuration in non-smm
mode. Typically, coreboot enables SMI at latest boot phase
post FSP-S, hence, FSP-S might get chance to perform GPP lock
configuration. With this code changes, coreboot can be able to
perform GPIO PAD lock configuration early in the boot flow,
prior to calling FSP-S.

Signed-off-by: Subrata Banik 
Change-Id: I71b4e2f24303b6acb56debd581bd6bc818b6f926
---
M src/soc/intel/common/block/gpio/gpio.c
1 file changed, 47 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/01/60801/1

diff --git a/src/soc/intel/common/block/gpio/gpio.c b/src/soc/intel/common/block/gpio/gpio.c
index 419c77e..8953667 100644
--- a/src/soc/intel/common/block/gpio/gpio.c
+++ b/src/soc/intel/common/block/gpio/gpio.c
@@ -552,8 +552,55 @@
    return err_response;
 }

+static void
+gpio_rmw32(gpio_t gpio_num, uint16_t offset, uint32_t anddata, uint32_t ordata)
+{
+	const struct pad_community *comm = gpio_get_community(gpio_num);
+
+	pcr_rmw32(comm->port, offset, anddata, ordata);
+}
+
+static int gpio_non_smm_lock_pad(gpio_t gpio_num, enum gpio_lock_action action)
+{
+	const struct pad_community *comm = gpio_get_community(gpio_num);
+	uint16_t offset;
+	size_t rel_pad;
+	uint32_t data;
+
+	rel_pad = relative_pad_in_comm(comm, gpio_num);
+	offset = comm->pad_cfg_lock_offset;
+	if (!offset) {
+		printk(BIOS_ERR, "%s: Error: offset not defined for pad %d!\n",
+					__func__, gpio_num);
+		return -1;
+	}
+
+	offset += gpio_group_index_scaled(comm, rel_pad, 2 * sizeof(uint32_t));
+	data = gpio_bitmask_within_group(comm, rel_pad);
+
+	switch (action) {
+	case GPIO_LOCK_CONFIG:
+		gpio_rmw32(gpio_num, offset, ~0, data);
+		break;
+	case GPIO_LOCK_TX:
+		gpio_rmw32(gpio_num, offset + 4, ~0, data);
+		break;
+	case GPIO_LOCK_FULL:
+		gpio_rmw32(gpio_num, offset, ~0, data);
+		gpio_rmw32(gpio_num, offset + 4, ~0, data);
+		break;
+	default:
+		break;
+	}
+
+	return 0;
+}
+
 int gpio_lock_pad(const gpio_t pad, enum gpio_lock_action action)
 {
+	if (!CONFIG(SOC_INTEL_COMMON_BLOCK_SMM_LOCK_GPIO_PADS))
+		return gpio_non_smm_lock_pad(pad, action);
+
    const struct gpio_lock_config pads = {
    	.pad = pad,
    	.action = action