[coreboot-gerrit] Change in coreboot[master]: superio/smsc/sch5545: Disable PS/2 lines isolation during init

[Michał Żygowski (Code Review)]

Michał Żygowski has submitted this change. ( https://review.coreboot.org/c/coreboot/+/59673 )

Change subject: superio/smsc/sch5545: Disable PS/2 lines isolation during init
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superio/smsc/sch5545: Disable PS/2 lines isolation during init

Disable PS/2 data and clock isolation in order to properly initialize
the PS/2 keyboard and mouse in payload/OS. These bits are set by OS via
ACPI and can survive S5 state. It is necessary to clear them after an
ungraceful shutdown in order to perform PS/2 controller initialization
e.g. in SeaBIOS.

TEST=PS/2 keyboard can always be successfully initialized in SeaBIOS
on Dell OptiPlex 9010

Signed-off-by: Michał Żygowski 
Change-Id: Iac6be095c996b357b5d4e8d75199f94a89bf73e9
Reviewed-on: https://review.coreboot.org/c/coreboot/+/59673
Reviewed-by: Angel Pons 
Tested-by: build bot (Jenkins) 
---
M src/superio/smsc/sch5545/superio.c
1 file changed, 6 insertions(+), 0 deletions(-)

Approvals:
  build bot (Jenkins): Verified
  Angel Pons: Looks good to me, approved

diff --git a/src/superio/smsc/sch5545/superio.c b/src/superio/smsc/sch5545/superio.c
index b6e5308..2fe5d03 100644
--- a/src/superio/smsc/sch5545/superio.c
+++ b/src/superio/smsc/sch5545/superio.c
@@ -62,6 +62,12 @@

switch (dev->path.pnp.device) {
    case SCH5545_LDN_KBC:
+		pnp_enter_conf_mode(dev);
+		pnp_set_logical_device(dev);
+		/* Disable PS/2 clock and data isolation */
+		pnp_unset_and_set_config(dev, 0xf0,
+					 SCH5545_KBD_ISOLATION | SCH5545_MOUSE_ISOLATION, 0);
+		pnp_exit_conf_mode(dev);
    	pc_keyboard_init(NO_AUX_DEVICE);
    	break;
    case SCH5545_LDN_LPC: