Shaunak Saha has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/42557 )
Change subject: soc/intel/tigerlake: Disable CPU PCIE in FSP
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Patch Set 3:
(1 comment)
https://review.coreboot.org/c/coreboot/+/42557/1//COMMIT_MSG
Commit Message:
https://review.coreboot.org/c/coreboot/+/42557/1//COMMIT_MSG@8
PS1, Line 8:
Please add the reasoning to the commit message.
Sure. Will do.
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Gerrit-Project: coreboot
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Gerrit-Change-Id: I7e8512d22b1463bc4207f80b16dcfb5d00ef4b46
Gerrit-Change-Number: 42557
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