Hello Hung-Te Lin, build bot (Jenkins), Patrick Georgi, Martin Roth, Julius Werner, CK HU, Yu-Ping Wu,
I'd like you to do a code review. Please visit
https://review.coreboot.org/c/coreboot/+/43081
to review the following change.
Change subject: Revert "mb/google/asurada: Add new MT8192 mainboard "Asurada"" ......................................................................
Revert "mb/google/asurada: Add new MT8192 mainboard "Asurada""
This reverts commit 02bab4ddcfe09c0cbbc82ece6c9575f573e8d799.
Reason for revert: UNSTABLE
Change-Id: Ib85c66c995eb82b228443f9513c8e696d2fe7d4c --- D src/mainboard/google/asurada/Kconfig D src/mainboard/google/asurada/Kconfig.name D src/mainboard/google/asurada/Makefile.inc D src/mainboard/google/asurada/board_info.txt D src/mainboard/google/asurada/boardid.c D src/mainboard/google/asurada/bootblock.c D src/mainboard/google/asurada/chromeos.c D src/mainboard/google/asurada/chromeos.fmd D src/mainboard/google/asurada/devicetree.cb D src/mainboard/google/asurada/mainboard.c D src/mainboard/google/asurada/memlayout.ld D src/mainboard/google/asurada/reset.c 12 files changed, 0 insertions(+), 198 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/81/43081/1
diff --git a/src/mainboard/google/asurada/Kconfig b/src/mainboard/google/asurada/Kconfig deleted file mode 100644 index e1c96f0..0000000 --- a/src/mainboard/google/asurada/Kconfig +++ /dev/null @@ -1,52 +0,0 @@ -## SPDX-License-Identifier: GPL-2.0-only - -# Umbrella option to be selected by variant boards. -config BOARD_GOOGLE_ASURADA_COMMON - def_bool n - -if BOARD_GOOGLE_ASURADA_COMMON - -config VBOOT - select EC_GOOGLE_CHROMEEC_SWITCHES - select VBOOT_VBNV_FLASH - -config BOARD_SPECIFIC_OPTIONS - def_bool y - select BOOTBLOCK_CONSOLE - select SOC_MEDIATEK_MT8192 - select BOARD_ROMSIZE_KB_8192 - select MAINBOARD_HAS_CHROMEOS - select CHROMEOS_USE_EC_WATCHDOG_FLAG if CHROMEOS - select COMMON_CBFS_SPI_WRAPPER - select SPI_FLASH - select SPI_FLASH_INCLUDE_ALL_DRIVERS - select EC_GOOGLE_CHROMEEC - select EC_GOOGLE_CHROMEEC_BOARDID - select EC_GOOGLE_CHROMEEC_SPI - select MAINBOARD_HAS_SPI_TPM_CR50 if VBOOT - select MAINBOARD_HAS_TPM2 if VBOOT - select MAINBOARD_HAS_NATIVE_VGA_INIT - select MAINBOARD_FORCE_NATIVE_VGA_INIT - select HAVE_LINEAR_FRAMEBUFFER - -config MAINBOARD_DIR - string - default "google/asurada" - -config MAINBOARD_PART_NUMBER - string - default "Asurada" if BOARD_GOOGLE_ASURADA - -config DRIVER_TPM_SPI_BUS - hex - default 0x0 - -config BOOT_DEVICE_SPI_FLASH_BUS - int - default 1 - -config EC_GOOGLE_CHROMEEC_SPI_BUS - hex - default 0x2 - -endif diff --git a/src/mainboard/google/asurada/Kconfig.name b/src/mainboard/google/asurada/Kconfig.name deleted file mode 100644 index df3dc24..0000000 --- a/src/mainboard/google/asurada/Kconfig.name +++ /dev/null @@ -1,5 +0,0 @@ -comment "Asurada" - -config BOARD_GOOGLE_ASURADA - bool "-> Asurada" - select BOARD_GOOGLE_ASURADA_COMMON diff --git a/src/mainboard/google/asurada/Makefile.inc b/src/mainboard/google/asurada/Makefile.inc deleted file mode 100644 index 3f5968a..0000000 --- a/src/mainboard/google/asurada/Makefile.inc +++ /dev/null @@ -1,14 +0,0 @@ -bootblock-y += memlayout.ld -bootblock-y += bootblock.c - -verstage-y += memlayout.ld -verstage-y += reset.c - -romstage-y += memlayout.ld -romstage-y += boardid.c - -ramstage-y += memlayout.ld -ramstage-y += boardid.c -ramstage-y += chromeos.c -ramstage-y += mainboard.c -ramstage-y += reset.c diff --git a/src/mainboard/google/asurada/board_info.txt b/src/mainboard/google/asurada/board_info.txt deleted file mode 100644 index b8059ad..0000000 --- a/src/mainboard/google/asurada/board_info.txt +++ /dev/null @@ -1,6 +0,0 @@ -Vendor name: Google -Board name: Asurada MediaTek MT8192 reference board -Category: eval -ROM protocol: SPI -ROM socketed: n -Flashrom support: y diff --git a/src/mainboard/google/asurada/boardid.c b/src/mainboard/google/asurada/boardid.c deleted file mode 100644 index 2c8efcd..0000000 --- a/src/mainboard/google/asurada/boardid.c +++ /dev/null @@ -1,15 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ - -#include <boardid.h> - -/* board_id is provided by ec/google/chromeec/ec_boardid.c */ - -uint32_t sku_id(void) -{ - return 0; -} - -uint32_t ram_code(void) -{ - return 0; -} diff --git a/src/mainboard/google/asurada/bootblock.c b/src/mainboard/google/asurada/bootblock.c deleted file mode 100644 index 5dcae8c..0000000 --- a/src/mainboard/google/asurada/bootblock.c +++ /dev/null @@ -1,7 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ - -#include <bootblock_common.h> - -void bootblock_mainboard_init(void) -{ -} diff --git a/src/mainboard/google/asurada/chromeos.c b/src/mainboard/google/asurada/chromeos.c deleted file mode 100644 index 8f9fa53..0000000 --- a/src/mainboard/google/asurada/chromeos.c +++ /dev/null @@ -1,20 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ - -#include <bootmode.h> -#include <boot/coreboot_tables.h> -#include <gpio.h> -#include <security/tpm/tis.h> - -void fill_lb_gpios(struct lb_gpios *gpios) -{ -} - -int get_write_protect_state(void) -{ - return 0; -} - -int tis_plat_irq_status(void) -{ - return 0; -} diff --git a/src/mainboard/google/asurada/chromeos.fmd b/src/mainboard/google/asurada/chromeos.fmd deleted file mode 100644 index 2635854..0000000 --- a/src/mainboard/google/asurada/chromeos.fmd +++ /dev/null @@ -1,45 +0,0 @@ -# Firmware Layout Description for Chrome OS. -# -# The size and address of every section must be aligned to at least 4K, except: -# RO_FRID, RW_FWID*, GBB, or any unused / padding / CBFS type sections. -# -# 'FMAP' may be found by binary search so its starting address should be better -# aligned to larger values. -# -# For sections to be preserved on update, add (PRESERVE) to individual sections -# instead of a group section; otherwise the preserved data may be wrong if you -# resize or reorder sections inside a group. - -FLASH@0x0 8M { - WP_RO@0x0 4M { - RO_SECTION { - BOOTBLOCK 128K - FMAP 4K - COREBOOT(CBFS) - GBB 0x2f00 - RO_FRID 0x100 - } - RO_VPD(PRESERVE) 32K # At least 16K. - } - RW_SECTION_A 1500K { - VBLOCK_A 8K - FW_MAIN_A(CBFS) - RW_FWID_A 0x100 - } - RW_MISC 36K { - RW_VPD(PRESERVE) 16K # At least 8K. - RW_NVRAM(PRESERVE) 8K - RW_DDR_TRAINING(PRESERVE) 8K - RW_ELOG(PRESERVE) 4K # ELOG driver hard-coded size in 4K. - } - RW_SECTION_B 1500K { - VBLOCK_B 8K - FW_MAIN_B(CBFS) - RW_FWID_B 0x100 - } - RW_SHARED 36K { # Will be force updated on recovery. - SHARED_DATA 4K # 4K or less for netboot params. - RW_UNUSED - } - RW_LEGACY(CBFS) 1M # Minimal 1M. -} diff --git a/src/mainboard/google/asurada/devicetree.cb b/src/mainboard/google/asurada/devicetree.cb deleted file mode 100644 index 0bdeec2..0000000 --- a/src/mainboard/google/asurada/devicetree.cb +++ /dev/null @@ -1,7 +0,0 @@ -## SPDX-License-Identifier: GPL-2.0-only - -chip soc/mediatek/mt8192 - device cpu_cluster 0 on - device cpu 0 on end - end -end diff --git a/src/mainboard/google/asurada/mainboard.c b/src/mainboard/google/asurada/mainboard.c deleted file mode 100644 index e6040fa..0000000 --- a/src/mainboard/google/asurada/mainboard.c +++ /dev/null @@ -1,17 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ - -#include <device/device.h> - -static void mainboard_init(struct device *dev) -{ -} - -static void mainboard_enable(struct device *dev) -{ - dev->ops->init = &mainboard_init; -} - -struct chip_operations mainboard_ops = { - .name = CONFIG_MAINBOARD_PART_NUMBER, - .enable_dev = mainboard_enable, -}; diff --git a/src/mainboard/google/asurada/memlayout.ld b/src/mainboard/google/asurada/memlayout.ld deleted file mode 100644 index 0f1fcec..0000000 --- a/src/mainboard/google/asurada/memlayout.ld +++ /dev/null @@ -1,3 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ - -#include <soc/memlayout.ld> diff --git a/src/mainboard/google/asurada/reset.c b/src/mainboard/google/asurada/reset.c deleted file mode 100644 index 3a97ee5..0000000 --- a/src/mainboard/google/asurada/reset.c +++ /dev/null @@ -1,7 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ - -#include <reset.h> - -void do_board_reset(void) -{ -}