Attention is currently required from: Raul Rangel, Andrey Pronin, Kangheui Won, Julius Werner, Rob Barnes. Karthik Ramasubramanian has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/58870 )
Change subject: soc/amd/psp_verstage: Init TPM on S0i3 resume ......................................................................
Patch Set 7:
(3 comments)
File src/Kconfig:
https://review.coreboot.org/c/coreboot/+/58870/comment/7561a938_487b1c40 PS5, Line 645: config RESUME_PATH_SAME_AS_BOOT
I'm not sure you should really have this set. […]
+1. Even though we are invoking a small subset of PSP verstage on S0i3 resume, it is not the same as boot path.
File src/soc/amd/common/psp_verstage/psp_verstage.c:
https://review.coreboot.org/c/coreboot/+/58870/comment/5970615e_6611d7bc PS5, Line 230: verstage_mainboard_s0i3_init();
Is there a good reason the normal verstage_mainboard_early_init() won't work for this? I think it wo […]
I think some additional GPIOs(eg. WLAN_AUX_REST_L) are re-initialized in ramstage. Since ramstage is not involved in S0i3 resume, it just disables those peripherals. Hence this custom GPIO initialization in S0i3 resume sequence. This is another reason selecting RESUME_PATH_SAME_AS_BOOT is not appropriate.
File src/soc/amd/common/psp_verstage/psp_verstage.c:
https://review.coreboot.org/c/coreboot/+/58870/comment/8b2b7f4f_93fbdddc PS6, Line 284: unmap_fch_devices(); Nit: Can be moved inside psp_verstage_s0i3_resume().