Hello Aaron Durbin, Furquan Shaikh,
I'd like you to do a code review. Please visit
https://review.coreboot.org/c/coreboot/+/33283
to review the following change.
Change subject: spi_flash: Add Dual SPI support ......................................................................
spi_flash: Add Dual SPI support
This patch adds support to read SPI flash in Dual SPI mode, where both MISO and MOSI lines are used for output mode (specifically Fast Read Dual Output (0x3b) where the command is still sent normally, not Fast Read Dual I/O (0xbb) whose additional benefit should be extremely marginal for our use cases but which would be more complicated to implement). This feature needs to be supported by both the flash chip and the controller, so we add a new dual_spi flag (and a new flags field to hold it) to the spi_flash structure and a new optional xfer_dual() function pointer to the spi_ctrlr structure. When both are provided, Dual SPI mode is used automatically, otherwise things work as before.
This patch only adds the dual_spi flag exemplary to all Winbond flash chips, other vendors need to be added as needed.
Change-Id: Ic6808224c99af32b6c5c43054135c8f4c03c1feb Signed-off-by: Julius Werner jwerner@chromium.org --- M src/drivers/spi/spi_flash.c M src/drivers/spi/spi_flash_internal.h M src/drivers/spi/winbond.c M src/include/spi-generic.h M src/include/spi_flash.h 5 files changed, 72 insertions(+), 3 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/83/33283/1
diff --git a/src/drivers/spi/spi_flash.c b/src/drivers/spi/spi_flash.c index d152027..dcb1108 100644 --- a/src/drivers/spi/spi_flash.c +++ b/src/drivers/spi/spi_flash.c @@ -58,6 +58,34 @@ return ret; }
+static int do_dual_read_cmd(const struct spi_slave *spi, const void *dout, + size_t bytes_out, void *din, size_t bytes_in) +{ + int ret; + + /* + * spi_xfer_vector() will automatically fall back to .xfer() if + * .xfer_vector() is unimplemented. So using vector API here is more + * flexible, even though a controller that implements .xfer_vector() + * and (the non-vector based) .xfer_dual() but not .xfer() would be + * pretty odd. + */ + struct spi_op vector = { .dout = dout, .bytesout = bytes_out, + .din = NULL, .bytesin = 0 }; + + if ((ret = spi_claim_bus(spi))) + return ret; + + if ((ret = spi_xfer_vector(spi, &vector, 1))) + goto release; + + ret = spi->ctrlr->xfer_dual(spi, NULL, 0, din, bytes_in); + +release: + spi_release_bus(spi); + return ret; +} + int spi_flash_cmd(const struct spi_slave *spi, u8 cmd, void *response, size_t len) { int ret = do_spi_flash_cmd(spi, &cmd, sizeof(cmd), response, len); @@ -104,6 +132,11 @@ cmd_len = 4; cmd[0] = CMD_READ_ARRAY_SLOW; do_cmd = do_spi_flash_cmd; + } else if (flash->flags.dual_spi && flash->spi.ctrlr->xfer_dual) { + cmd_len = 5; + cmd[0] = CMD_READ_FAST_DUAL_OUTPUT; + cmd[4] = 0; + do_cmd = do_dual_read_cmd; } else { cmd_len = 5; cmd[0] = CMD_READ_ARRAY_FAST; @@ -346,8 +379,12 @@ return -1; }
- printk(BIOS_INFO, "SF: Detected %s with sector size 0x%x, total 0x%x\n", - flash->name, flash->sector_size, flash->size); + const char *mode_string = ""; + if (flash->flags.dual_spi && spi.ctrlr->xfer_dual) + mode_string = " (Dual SPI mode)"; + printk(BIOS_INFO, + "SF: Detected %s with sector size 0x%x, total 0x%x%s\n", + flash->name, flash->sector_size, flash->size, mode_string); if (bus == CONFIG_BOOT_DEVICE_SPI_FLASH_BUS && flash->size != CONFIG_ROM_SIZE) { printk(BIOS_ERR, "SF size 0x%x does not correspond to" diff --git a/src/drivers/spi/spi_flash_internal.h b/src/drivers/spi/spi_flash_internal.h index f15c737..4a9e289 100644 --- a/src/drivers/spi/spi_flash_internal.h +++ b/src/drivers/spi/spi_flash_internal.h @@ -23,6 +23,8 @@ #define CMD_READ_ARRAY_FAST 0x0b #define CMD_READ_ARRAY_LEGACY 0xe8
+#define CMD_READ_FAST_DUAL_OUTPUT 0x3b + #define CMD_READ_STATUS 0x05 #define CMD_WRITE_ENABLE 0x06
diff --git a/src/drivers/spi/winbond.c b/src/drivers/spi/winbond.c index d0ef3cd..9e9bb00 100644 --- a/src/drivers/spi/winbond.c +++ b/src/drivers/spi/winbond.c @@ -26,7 +26,9 @@
struct winbond_spi_flash_params { uint16_t id; - uint8_t l2_page_size_shift; + uint8_t dual_spi : 1; + uint8_t _reserved_for_flags : 3; + uint8_t l2_page_size_shift : 4; uint8_t pages_per_sector_shift : 4; uint8_t sectors_per_block_shift : 4; uint8_t nr_blocks_shift; @@ -123,6 +125,7 @@ .sectors_per_block_shift = 4, .nr_blocks_shift = 4, .name = "W25X80", + .dual_spi = 1, }, { .id = 0x3015, @@ -131,6 +134,7 @@ .sectors_per_block_shift = 4, .nr_blocks_shift = 5, .name = "W25X16", + .dual_spi = 1, }, { .id = 0x3016, @@ -139,6 +143,7 @@ .sectors_per_block_shift = 4, .nr_blocks_shift = 6, .name = "W25X32", + .dual_spi = 1, }, { .id = 0x3017, @@ -147,6 +152,7 @@ .sectors_per_block_shift = 4, .nr_blocks_shift = 7, .name = "W25X64", + .dual_spi = 1, }, { .id = 0x4014, @@ -155,6 +161,7 @@ .sectors_per_block_shift = 4, .nr_blocks_shift = 4, .name = "W25Q80_V", + .dual_spi = 1, }, { .id = 0x4015, @@ -163,6 +170,7 @@ .sectors_per_block_shift = 4, .nr_blocks_shift = 5, .name = "W25Q16_V", + .dual_spi = 1, .protection_granularity_shift = 16, .bp_bits = 3, }, @@ -173,6 +181,7 @@ .sectors_per_block_shift = 4, .nr_blocks_shift = 5, .name = "W25Q16DW", + .dual_spi = 1, .protection_granularity_shift = 16, .bp_bits = 3, }, @@ -183,6 +192,7 @@ .sectors_per_block_shift = 4, .nr_blocks_shift = 6, .name = "W25Q32_V", + .dual_spi = 1, .protection_granularity_shift = 16, .bp_bits = 3, }, @@ -193,6 +203,7 @@ .sectors_per_block_shift = 4, .nr_blocks_shift = 6, .name = "W25Q32DW", + .dual_spi = 1, .protection_granularity_shift = 16, .bp_bits = 3, }, @@ -203,6 +214,7 @@ .sectors_per_block_shift = 4, .nr_blocks_shift = 7, .name = "W25Q64_V", + .dual_spi = 1, .protection_granularity_shift = 17, .bp_bits = 3, }, @@ -213,6 +225,7 @@ .sectors_per_block_shift = 4, .nr_blocks_shift = 7, .name = "W25Q64DW", + .dual_spi = 1, .protection_granularity_shift = 17, .bp_bits = 3, }, @@ -223,6 +236,7 @@ .sectors_per_block_shift = 4, .nr_blocks_shift = 8, .name = "W25Q128_V", + .dual_spi = 1, .protection_granularity_shift = 18, .bp_bits = 3, }, @@ -233,6 +247,7 @@ .sectors_per_block_shift = 4, .nr_blocks_shift = 8, .name = "W25Q128FW", + .dual_spi = 1, .protection_granularity_shift = 18, .bp_bits = 3, }, @@ -243,6 +258,7 @@ .sectors_per_block_shift = 4, .nr_blocks_shift = 8, .name = "W25Q128J", + .dual_spi = 1, .protection_granularity_shift = 18, .bp_bits = 3, }, @@ -253,6 +269,7 @@ .sectors_per_block_shift = 4, .nr_blocks_shift = 9, .name = "W25Q256_V", + .dual_spi = 1, .protection_granularity_shift = 16, .bp_bits = 4, }, @@ -263,6 +280,7 @@ .sectors_per_block_shift = 4, .nr_blocks_shift = 9, .name = "W25Q256J", + .dual_spi = 1, .protection_granularity_shift = 16, .bp_bits = 4, }, @@ -681,6 +699,8 @@ flash->erase_cmd = CMD_W25_SE; flash->status_cmd = CMD_W25_RDSR;
+ flash->flags.dual_spi = params->dual_spi; + flash->ops = &spi_flash_ops; flash->driver_private = params;
diff --git a/src/include/spi-generic.h b/src/include/spi-generic.h index c24aadd..d0f957f 100644 --- a/src/include/spi-generic.h +++ b/src/include/spi-generic.h @@ -125,6 +125,7 @@ * setup: Setup given SPI device bus. * xfer: Perform one SPI transfer operation. * xfer_vector: Vector of SPI transfer operations. + * xfer_dual: (optional) Perform one SPI transfer in Dual SPI mode. * max_xfer_size: Maximum transfer size supported by the controller * (0 = invalid, * SPI_CTRLR_DEFAULT_MAX_XFER_SIZE = unlimited) @@ -145,6 +146,8 @@ size_t bytesout, void *din, size_t bytesin); int (*xfer_vector)(const struct spi_slave *slave, struct spi_op vectors[], size_t count); + int (*xfer_dual)(const struct spi_slave *slave, const void *dout, + size_t bytesout, void *din, size_t bytesin); uint32_t max_xfer_size; uint32_t flags; int (*flash_probe)(const struct spi_slave *slave, diff --git a/src/include/spi_flash.h b/src/include/spi_flash.h index 936b0ab..3a0c383 100644 --- a/src/include/spi_flash.h +++ b/src/include/spi_flash.h @@ -90,6 +90,13 @@ struct spi_flash { struct spi_slave spi; u8 vendor; + union { + u8 raw; + struct { + u8 dual_spi : 1; + u8 _reserved : 7; + }; + } flags; u16 model; const char *name; u32 size;