[coreboot-gerrit] Change in coreboot[master]: soc/intel/xeon_sp: Add read CPU PPIN MSR function

[Johnny Lin (Code Review)]

Hello Jonathan Zhang, Jingle Hsu, Morgan Jang, Patrick Rudolph,

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/42901

to look at the new patch set (#2).

Change subject: soc/intel/xeon_sp: Add read CPU PPIN MSR function
......................................................................

soc/intel/xeon_sp: Add read CPU PPIN MSR function

These changes are in accordance with the documentation:
[*] page 208-209
    Intel(R) 64 and IA-32 Architectures, Software Developer’s Manual,
    Volume 4: Model-Specific Registers. May 2019.
    Order Number: 335592-070US

Tested on OCP Tioga Pass and Delta Lake.

Change-Id: I8c2eac055a065c06859a3cb7b48ed59f15ae2fc4
Signed-off-by: Johnny Lin 
---
M src/soc/intel/xeon_sp/cpx/cpu.c
M src/soc/intel/xeon_sp/cpx/include/soc/cpu.h
M src/soc/intel/xeon_sp/skx/cpu.c
M src/soc/intel/xeon_sp/skx/include/soc/cpu.h
4 files changed, 66 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/01/42901/2